דרושים » חשמל ואלקטרוניקה » Lead SoC Architect

A leading supplier of custom SOC and security hardware solutions for the computing and server markets. As a well-established and independent design center, we collaborate closely with top-tier customers such as HP, Dell, Qualcomm, Microsoft, and Google to develop advanced solutions that secure, control, and manage our customers platforms. We are seeking a talented and experienced Chip Architect to join our team. The ideal candidate is a self-motivated, fast learner with a strong background in hardware and system architecture. This role requires a technology leader capable of driving multidisciplinary programs and working closely with customers and internal teams across the entire product lifecycle.
Responsibilities:
* Translate customer and marketing requirements into detailed SOC architectural specifications
* Provide functional specifications for chip hardware design and Embedded software development
* Lead architectural decisions and serve as a technical authority across cross-functional teams
* Collaborate with customers and marketing to refine product requirements and align on technical solutions
* Support design, implementation, and verification processes throughout development
* Participate in system debugging, root-cause analysis, and issue resolution
* Support post-silicon bring-up, system integration, and software enablement

We are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities
Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.

we are seeking a Lead System Architect to join our system architecture team and help define the next generation of our AI-SuperNIC scale-out chip.
AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.
You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.
Responsibilities:
Define product requirements and architecture for next-generation ultra low-latency AI-SuperNIC
Design end-to-end data paths across NIC, host, and GPU memory, with focus on GPU connectivity (PCIe, NVLink, CXL)
Lead adoption of emerging standards such as UEC and UALink, while maintaining compatibility with existing ecosystems
Establish architecture guidelines and partitioning across hardware, firmware, and software
Drive performance modeling, analysis, and system-level optimization for AI workloads
Optimize scale-out communication patterns (e.g., collectives) for GenAI training and inference
Collaborate with software teams on drivers, runtimes, and integration with AI frameworks
Work with R&D, CTO, and peer architects on system definition and trade-offs
Engage with customers and partners to shape system requirements and use cases

we are looking for a Senior HW architect
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing:
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

The system engineering team is responsible for developing, integrating, and building advanced sensing systems, combining cutting-edge modules with advanced algorithms across multi-disciplinary domains: electro-optical components, unique physical models, bio-mechanical considerations, mechanical and electrical trade-offs, dedicated SW & FW, large-scale data analysis, and classic and ML-based algorithms.

Responsibilities
Own the complete system life-cycle - from Proof-Of-Concept through preliminary design, detailed architecture, module builds, testability, and delivery to mass-production.
Risk mapping and mitigation activities.
Define data collection requirements.
Signal analysis and trade-off mapping.
System optimization.
Collaborate with multiple HW and SW teams to analyze and optimize overall system performance.
Define and track system specifications.
Lead multi-disciplinary teams to deliver reliable, high-performance system features.

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the company-Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.
Responsibilities
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment. As a Wireless MAC System Architect, you will be a core member of our highly innovative and visible Wireless System-on-Chip (SoC) design team that defines modem architectures, develops MAC-layer algorithms, and invents embedded DSP algorithms for chips enabling exciting new wireless applications. You will be responsible for developing state-of-the-art wireless SoC products that are enjoyed by millions of our customers. Application areas include ultra-wideband sensing and specialized wireless audio; products enabled or improved by our teams SoCs include specialized audio headsets (such as AirPods), watches and iPhones.

In this role you will be responsible for the architecture of the Connectivity IP with focus on the MAC sub-system: - Define, document and Spec Connectivity MAC architecture and performance requirements.
- Analyze & simulate the performance of the Connectivity IP in real-life use-cases, achieving benchmarking performances in several metrics, including Throughput, Robustness, Co-existence with other Wireless IPs and more.
- Working closely with other architects (PHY, Power Management, FW and SW) to introduce best in class Connectivity IP solution.
- Develop innovative system architectures and protocols to deliver best-in-class performance for the MAC subsystem of custom wireless silicon solutions.
- Introduce cross-domain features where opportunities exist for innovation to achieve enhanced performance.
- Produce MAC architecture, specifications and corresponding performance/reference modeling in support of digital HW and FW design and verification efforts.
- Develop and maintain a MAC systems infrastructure applying the best methodologies for system-level simulation, pre-silicon prototyping (including emulation and FPGA prototyping), FW QA, regression and MTBF testing, and system verification to ensure first-time design success.
- Support the delivery of new wireless technologies to the Product Systems teams.

We are looking for exceptional senior chip architects to join a world-class team that is reinventing how workloads run at scale.

As a Chip Architect, you will define architecture and micro-architecture across the complete product lifecycle - from initial requirements and early-stage technology exploration through design, implementation, and production deployment. You will explore and analyze architectural options for current and next-generation solutions, including new physical layer (PHY) and interconnect technologies, innovative protocols, and fundamental improvements to our hardware and software stack to make us the best place to run ML workloads and establish Annapurna Labs solutions as the industry-leading platform for Training and Inference workloads.

This role requires a top-down understanding of our complete solution stack, including system architecture, software stack, chip architecture, and microarchitecture. You will work in close collaboration with multiple groups - Software, Silicon engineering, System and Platform teams, and cross-functional teams across us. Your architectural decisions will influence the design of chips deployed on millions of servers worldwide, powering the future of AI, machine learning, and general-purpose compute. This is an opportunity to have large-scale impact on how the world builds and deploys infrastructure.

We are seeking a Embedded Systems Software Architect to own the technical direction of our embedded software platforms. This role combines hands-on development, system architecture, and technical leadership, guiding a team of embedded engineers while ensuring high-quality, scalable, and reliable software across current and future products.
You will act as the technical authority for embedded software, working closely with hardware, systems, and product stakeholders to translate requirements into robust software solutions.
What will your job look like?
Lead the technical direction and architecture of embedded software platforms across middleware and application layers.
Serve as the technical authority for embedded software, combining hands-on C/C++ development with system-level ownership.
Design scalable, modular software architectures and define clear interfaces between hardware, OS services, middleware, and application software.
Drive key technical decisions, architectural trade-offs, and long-term roadmap.
Develop and integrate middleware and application-layer components, including multi-threaded and real-time logic.
Lead design reviews, mentor embedded software engineers, and promote high coding and architectural standards.
Take ownership of complex system-level debugging, performance optimization, and software quality.
Work closely with OS, systems, product, QA, and manufacturing teams to translate product requirements into robust technical solutions.