we are looking for a Lead SoC Architect.
Responsibilities:
Definition and detailed hardware specifications of subsystems in the SoC
Breaking down the sub-system architecture into microarchitectural blocks with the related firmware, and SW components.
Understanding the system in which the SoC is integrated to and designing the SoC to perfectly fit into the datacenter system.

Nuvoton Israel is a leading supplier of custom SoC and security hardware solutions for the computing and server markets. As a well-established and independent design center, we collaborate closely with top-tier customers such as HP, Dell, Qualcomm, Microsoft, and Google to develop advanced solutions that secure, control, and manage our customers platforms. We are seeking a talented and experienced Chip Architect to join our team. The ideal candidate is a self-motivated, fast learner with a strong background in hardware and system architecture. This role requires a technology leader capable of driving multidisciplinary programs and working closely with customers and internal teams across the entire product lifecycle. Responsibilities:
* Translate customer and marketing requirements into detailed SoC architectural specifications
* Provide functional specifications for chip hardware design and embedded software development
* Lead architectural decisions and serve as a technical authority across cross-functional teams
* Collaborate with customers and marketing to refine product requirements and align on technical solutions
* Support design, implementation, and verification processes throughout development
* Participate in system debugging, root-cause analysis, and issue resolution
* Support post-silicon bring-up, system integration, and software enablement

We are looking for a Linux kernel expert with deep knowledge in the PCIe standard. As a Linux Kernel PCIe Architect, you will be part of the OS Architecture team and will be responsible to define the operating system solutions based on the PCIe standard for connectivity with peripherals and as an interconnect between multiple EyeQ SoCs.
This is an exciting and unique opportunity to work with highly talented Linux OS architecture and developments teams and be a leader in the definition of the cutting-edge technology for the Automotive AI applications.
What will your job look like?
Researching and defining the SW solutions based on the PCIe standard and the Linux implementation for the PCIe stack
Designing and Implementing the SW Stack for the communication between the EyeQ SoCs laying the infrastructure for cross chip neural networks.
Defining the future HW solutions by working closely with the SoC Architecture team in a SW/HW co-development environment.
Performing performance analysis, feasibility studies, PoCs and optimization flows to achieve the highest performance with minimal resources.
Work closely with the Linux Kernel team and provide the technical guidance and mentoring for development engineers.

Our Autonomous Driving software group is looking for a Linux kernel expert with deep knowledge in the PCIe standard. As a Linux Kernel PCIe Architect, you will be part of the OS Architecture team and will be responsible to define the operating system solutions based on the PCIe standard for connectivity with peripherals and as an interconnect between multiple EyeQ SoCs.
This is an exciting and unique opportunity to work with highly talented Linux OS architecture and developments teams and be a leader in the definition of the cutting-edge technology for the Automotive AI applications.
What will your job look like?
Researching and defining the SW solutions based on the PCIe standard and the Linux implementation for the PCIe stack
Designing and Implementing the SW Stack for the communication between the EyeQ SoCs laying the infrastructure for cross chip neural networks.
Defining the future HW solutions by working closely with the SoC Architecture team in a SW/HW co-development environment.
Performing performance analysis, feasibility studies, PoCs and optimization flows to achieve the highest performance with minimal resources.
Work closely with the Linux Kernel team and provide the technical guidance and mentoring for development engineers.

you will define system and IP architectures, develop architectural models, and author technical specifications for a variety of high-performance, high-quality, low-power, world-class products.

You will

Define and drive architectures across multiple domains, spanning chip-level components, subsystems, and system-level workflows.

Translate product requirements into architectural specifications, features, and hardware/software execution models for implementation teams.

Lead cross-functional technical decisions, balancing functionality, performance, scalability, power, and implementation trade-offs.

We are looking for a Senior Software/Firmware Architect to join our Host Management group. The architect will develop the next-generation management solutions for our networking infrastructure environments. We are a team that values technical depth, clear ownership, and respectful collaboration. We believe great architecture is built through curiosity, rigorous thinking, and close partnership across disciplines. We welcome architects who bring different perspectives, ask hard questions, and want to build systems that matter at scale.

Our team handles the software and firmware that support host management flows throughout platform control software, baseboard management controllers, hardware interfaces, data monitoring, restoration processes, energy regulation, module management, and system orchestration. In this role, you will develop architecture, lead multi-departmental teams, and convert complex platform requirements into scalable, reliable, production-ready solutions.

What you will be doing:

Lead architecture definition for Host Management SW and FW across our networking platforms.

Define system flows across host software, embedded firmware, BMC, device firmware, and hardware interfaces.

Guide the development of architecture for telemetry, recovery, power management, module management, firmware update flows, and control protocols.

Convert product, customer, and platform needs into clear technical specifications and implementation plans.

Work closely with SW, FW, HW, validation, program, architecture, and customer-facing teams.

Provide technical leadership to engineers implementing complex cross-domain features.

Own architecture documentation and communicate technical direction clearly to engineering and leadership.

We are looking for a talented and experienced Firmware Architect to join our Network Adapter Firmware team in Yokneam.

As part of our technical leadership team, you will define the firmware architecture for next-generation networking devices and drive design of innovative technologies powering the world biggest AI Platforms, cloud computing, HPC, storage, and automotive platforms.

The Network Firmware team develops cutting-edge firmware that enables the world's largest cloud providers and enterprises to deliver high-performance, reliable, and secure networking solutions. Working alongside exceptional engineers across the globe, you'll thrive in a dynamic, collaborative, and fast-paced environment while solving some of the industry's most challenging technical problems.

What you'll be doing:
Collaborate closely with Hardware, Software, and System Architecture teams to define end-to-end solutions.
Define the firmware architecture for new products and features at the core of our NIC firmware.
Lead the design and implementation of strategic technologies, including functional safety, security, and next-generation networking capabilities.
Mentor and technically guide R&D engineers throughout architecture, design, and implementation.
Drive technical direction across multiple teams while ensuring scalable, maintainable, and high-quality firmware architecture.

We are looking for an outstanding Senior Networking Software Architect to join the NIC/DPU Software and Firmware Architecture group. In this role, you will help define the next generation of our datacenter and AI networking platforms, with focus on DPU management, QoS, performance, telemetry, and software architecture across stacks. You will work closely with hardware designers, firmware/kernel driver teams, system engineers, validation, product management and customers. The role spans early architecture definition, pre-silicon design, bring-up, and production readiness for large-scale AI and cloud datacenter deployments.

What Youll Be Doing:

Own software and system architecture for next-generation DPU management, QoS, performance, telemetry, and observability features.

Define end-to-end control and management flows across DOCA, host drivers, embedded firmware, BMC, management controllers and external management systems.

Specify telemetry and observability requirements, including counters, logs, traces, events, health monitoring, debug data, and streaming telemetry.

Define management interfaces and APIs for configuration, provisioning, lifecycle operations, diagnostics, and field serviceability.

Write clear architecture specifications, interface definitions, flow diagrams, and design documents for software, firmware, and system teams.

Partner with R&D teams to translate high-level architecture into implementable designs and guide features through development, validation, silicon bring-up, and production.

Analyze system performance bottlenecks, interoperability issues, telemetry gaps, and customer-reported issues, then feed learnings into future architecture.

Collaborate with system and cluster architects to ensure NIC/DPU features fit end-to-end AI datacenter and cloud networking designs.

Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

We are seeking an experienced Principal Architect to lead the architecture of high-performance connectivity solutions, with a strong focus on PCIe, high-speed networking, and Ethernet-based systems.
This role will define next-generation architectures for AI infrastructure, working at the intersection of silicon, system, and protocol design. You will play a key role in shaping innovative solutions that enable hyperscale customers to build scalable, high-bandwidth, and low-latency systems.
This is a unique opportunity to join a new and growing Israel site, influence technical direction, and take ownership of critical architectural decisions impacting industry-leading products.
Key Responsibilities
Define and drive system and chip-level architecture for high-speed connectivity products
Lead architecture for PCIe-based interconnects, networking protocols, and Ethernet subsystems
Analyze system requirements and translate them into scalable and efficient hardware architectures
Drive tradeoff analysis across performance, power, latency, area, and cost
Collaborate with cross-functional teams including RTL, Physical Design, Firmware, Validation, and Product Engineering
Define and review micro-architecture specifications and ensure alignment across teams
Contribute to standard-based and custom protocols for next-generation AI infrastructure
Support performance modeling, simulation, and architectural validation
Work closely with customers and partners to understand emerging use cases and requirements
Mentor engineers and help build strong technical leadership within the Israel R&D center.