דרושים » חשמל ואלקטרוניקה » לחברה בתחום האוטומציה והבקרה דרוש /ה מהנדס /ת בקרה - מיקום: קיסריה

Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.

Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.

Define product specifications, develop electrical schematics, and guide component selection.

Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.

As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.

You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be leveraging your backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.

You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.

Responsibilities:
As a member of the Package Design team, you will:

Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing support.

Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.

Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.

Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.

Assist in developing and improving package design methodologies, flows, and best practices.

Contribute to debugging, issue resolution, and package bring‑up activities as needed.