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לפני 7 שעות
חברה חסויה
Location: Hod Hasharon
Job Type: Full Time
We are looking for a highly analytical, detail-oriented Innovation Expert to join our Open Innovation team. This role is ideal for an individual contributor operating at the intersection of deep tech, the startup ecosystem, and academia, with strong technology analytical skills, clear communication, and a foundational background in computer architecture research.
In this role, you will drive our external innovation strategy by managing academic research collaborations, scouting early-stage deep-tech startups, and conducting technical due diligence.
Key Responsibilities:
Academic Cooperation & Research Partnerships: Identify and build direct collaboration agreements with world-class professors, research labs, and universities. Facilitate joint research projects, tech-transfer initiatives, and track academic spin-offs.
Startup Scouting & Ecosystem Mapping: Actively identify, source, and map early-stage deep-tech startups and emerging tech companies globally within the companys strategic domains.
Technical Due Diligence: Evaluate startup technologies, product-market fit, and team capabilities. Analyze technical validity and assess how external innovations align with our internal roadmaps.
Ecosystem Analysis: Conduct deep-dive analyses of startup ecosystems, venture capital trends, and academic spin-offs to identify high-potential investment and collaboration opportunities.
Investment & Collaboration Support: Synthesize technical and commercial findings into clear, structured scouting reports, investment tech memos, and presentations for senior leadership to drive partnership or investment decisions.
Cross-Border Collaboration: Act as a bridge between startup founders, academic innovators, and internal global teams (including European and China-based business units) to facilitate joint POCs, or investment reviews.
Track Tech Domains: AI infrastructure, advanced semiconductors, hardware-software co-design, and AI data movement.
Requirements:
Education: Bachelors degree (or higher) in Computer Science, Software Engineering, Computer/Electrical Engineering, or a related deep-tech field.
Analytical & Due Diligence Skills: Strong ability to comprehend complex technical content, read academic papers, and evaluate startup pitch decks, market research, and technical documentation.
Communication Excellence: Highly skilled in translating technical data into high-impact summaries, landscape maps, and technical presentations.
Nice to Have
Experience in academic-industry collaborations.
Experience working within a startup accelerator, venture capital firm, or corporate innovation hub.
This position is open to all candidates.
 
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לפני 13 שעות
דרושים בNishapro
Job Type: Full Time and Hybrid work
We are looking for an experienced and creative Verification engineer to join our Processor Verification Team.

In this role, you will be responsible for verifying the core units of our next-generation processors. You will work closely with the architecture and design teams to ensure functional correctness through advanced verification methodologies, taking ownership of verification environments from planning to coverage closure.
Requirements:
Education: B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering.
Experience: 7+ years of hands-on VLSI verification experience.
Core Expertise: Deep knowledge of SystemVerilog and UVM (Universal Verification Methodology).
Technical Advantages:

Experience in Processors Verification (arithmetic units, control logic) is a significant advantage.
Background in RTL Design or a strong ability to read and analyze Verilog implementation.
Experience with C / C ++ programming is an advantage.
Scripting capabilities ( Python / PERL ) for automation and flow efficiency
This position is open to all candidates.
 
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לפני 7 שעות
Location: Hod Hasharon and Haifa
Job Type: Full Time
We are looking for an outstanding Research Team Lead with deep hands-on expertise in large-scale distributed systems, AI framework infrastructure, and performance optimization on custom accelerators. If you are a visionary technical leader, a skilled communicator, and a team builder who thrives at the frontier of systems and AI research - you're welcome on board.
What Will You Be Doing?
Lead and grow a world-class team of researchers and engineers working on distributed AI infrastructure and systems software
Architect and own the software infrastructure enabling distributed training and inference on Huawei's custom accelerator hardware (e.g., Ascend NPU)
Drive research and development on communication libraries, runtime systems, memory management, and graph execution & synchronization at scale
Optimize end-to-end performance across large-scale clusters, covering both scale-up (multi-device) and scale-out (multi-node) configurations
Design and implement high-performance communication backends and collective operations (AllReduce, AllGather, broadcast) for distributed training workloads
Collaborate cross-functionally with hardware architects, compiler teams, and framework engineers to co-design hardware-software solutions
Publish and present research findings at top international venues (NeurIPS, EuroSys, SC, MLSys, OSDI) and represent the team externally
Mentor engineers and researchers, conduct performance and growth reviews, and shape team culture and technical direction
Partner with top academic institutions and open-source communities to advance the state of the art in distributed AI systems
Requirements:
B.Sc. or higher in Computer Science, Computer Engineering, Electrical Engineering, or a closely related field
8+ years of experience in systems software, distributed computing, or AI infrastructure, with 3+ years in a leadership or team lead role
Deep expertise in large-scale communication systems: collective communication, RDMA, network topology-aware routing, and bandwidth optimization
Hands-on experience building software infrastructure for distributed training on custom accelerators or heterogeneous hardware (GPU, NPU, TPU)
Strong knowledge of runtime systems: scheduling, execution graphs, kernel dispatch, synchronization primitives, and pipeline management
Experience with memory management at scale: activation checkpointing, tensor offloading, rematerialization, KV cache management
Proficiency in C/C++ and Python, with a focus on high-performance, production-quality code in Linux environments
Proven ability to define technical vision, lead multi-person projects end-to-end, and deliver results under research and engineering timelines
Excellent communication skills in English - confident presenting to international audiences, writing technical reports, and driving cross-team alignment
Strong collaborative mindset and experience working in globally distributed, multicultural teams
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8709056
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לפני 8 שעות
Location: Hod Hasharon
Job Type: Full Time
Research and Innovation Center, is looking for an experienced software engineer with expertise in Linux kernel and virtualization design + development to join our Future-Computing-Infrastructure expert group. The group designs and develops technologies for the next-generation data center aimed at accelerating AI workloads for a unique HW, optimizing compute resource utilization and reducing data-center costs. Our projects involve hardware and software architecture co-design. They require high-level system understanding, creativity and innovative thinking.
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!
What will you be doing?
Design and develop Linux kernel code related to virtual memory management and memory-tiering
Research, design and innovate methods, algorithms and supporting data-structures for managing memory hierarchies in virtualization environments
Participate in research to analyze AI-based applications performance, identify bottlenecks and optimize various decision-making mechanisms based on benchmarking results
Collaborate with professional team members and various global teams around the world on a daily basis
Challenged to think outside of the box and come up with creative ideas to deal with complex challenges within Linux kernel
Requirements:
Bachelor degree or higher in Computer Engineering / Computer Science or equivalent
5+ years of experience in software development in Linux environment
5+ years of experience in storage / memory tiering / caching or prefetching domains
5+ years of hands-on experience in Linux kernel development / hacking / research
Proficiency in C / C++ programming language
Proven experience in Linux kernel memory management sub-system
Working in Linux kernel open-source environment
Deep system understanding and capability to enhance existing code
Open-minded team player with a can-do attitude
Fast learner, highly organized and detail-oriented, able to work on multiple deadlines in a fast-paced atmosphere
Ways to stand out from the crowd:
M.Sc. or Ph.D. degree with expertise in fields related to OS and virtualization technology
Papers and/or proven innovation in virtualization, storage/memory tiering or caching domains
2+ years of experience in optimizing applications performance
Proficiency in additional low-level programming languages
Proficiency in high-level programming languages: Python
Familiarity with Agentic-AI workloads, their characteristics and bottlenecks
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708772
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לפני 8 שעות
חברה חסויה
Location: Hod Hasharon
Job Type: Full Time
we are looking for a HW Architect team leader.
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing:
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence
Requirements:
BSc / MSc / PhD in Electrical Engineering, Computer Engineering, or a related field.
10+ years of experience in VLSI / ASIC design, chip architecture, or micro-architecture of complex blocks.
Proven experience leading or managing a small team of designers, verification engineers, or HW architects.
Ability to take an idea into implementation.
Strong background in high-speed networking systems, such as:
o Ethernet Switches
o NPUs
o NICs
o Traffic Managers
o Fabric Switches
o High-performance processors
Skills
What Were Looking For
Strong technical leadership with the ability to drive architectural vision.
Excellent written and verbal communication skills in English.
Outstanding collaboration and teamwork skills across disciplines and organizational levels.
Independent, self-driven, and comfortable taking full ownership of complex challenges.
Passion for innovation and cutting-edge networking technologies.
Highly motivated with a proactive, can-do mindset.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708818
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לפני 8 שעות
חברה חסויה
Location: Hod Hasharon and Haifa
Job Type: Full Time
We are looking for a Senior AI Modeling Architect to define and model the architecture of our next-generation AI processors. In this role, you will serve as a key technical authority - bringing not only strong modeling capabilities, but also the architectural vision to propose and drive end-to-end solutions to complex design challenges.
You will work at high levels of abstraction, partnering closely with HW and SW architects to co-invent optimal solutions, validate them through simulation, and influence design decisions based on experimental data.
Responsibilities:
Model CPU/AI processor functionality and performance using SystemC and pre-silicon simulation environments
Define and drive architectural solutions - not only identify problems, but come with concrete proposals and alternatives
Partner with lead HW and SW architects to co-design features and evaluate trade-offs across the stack
Analyze bottlenecks and performance on workloads reflecting future AI use cases
Provide proof-of-concept implementations for new architectural features and design alternatives
Potentially lead feature definition in addition to the modeling role
Requirements:
B.Sc. or higher in Electrical Engineering, Computer Science, or related discipline
10+ years of experience in VLSI/processor architecture (exceptional candidates with less experience will be considered)
Strong hands-on experience with SystemC modeling
Solid background in AI workloads and AI hardware architecture
Experience in HW/SW co-design and architectural trade-off analysis
Ability to operate at high levels of abstraction and drive architectural decisions from simulation data
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708854
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לפני 7 שעות
Location: Hod Hasharon and Haifa
Job Type: Full Time
we are looking for a Wafer-Scale System: Computation (LLM) and Communication (NoC) Co-Design.
Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system
Requirements:
Master in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
Background in interconnection networks and computer architecture is a must.
Demonstrated research expertise in one or both of the following areas:
Network-on-Chip (NoC) architecture, including routing, flow control, topologies, and performance modeling
LLM parallel execution and co-design, including workload decomposition, communication-computation overlap, and mapping to high-performance interconnects
Excellent analytical, problem-solving, and system-level thinking skills.
Excellent programming skills with hands-on experience in simulator modeling, development and simulator-based evaluation.
Strong verbal and written communication skills, and the ability to work both independently and collaboratively in a cross-disciplinary team.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8709002
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לפני 8 שעות
חברה חסויה
Location: Hod Hasharon and Haifa
Job Type: Full Time
we are looking for a Compilation Technology Expert.
This team will operate under a unique manner, as described below -
The environment
- Startup-like intensity
Small team
High ownership
High visibility
Merit is the essence, not titles
- Fast pace
Todays state of the art is tomorrows baseline
We aim to go beyond
- Incubator mindset
Take on hard challenges, dismantle, and regroup as novelty
- Elite technical culture
Strong experts
Strong standards
Strong execution.
Ratio beats seniority, not the other way around
- No artificial boundaries
We challenge assumptions, and question constraints, and leave no quarter
- Direct exposure to the latest and greatest AI technology
Real hardware
Real toolchains
Real large-scale AI applications
All pass through and impacted by our work
- First-principles thinking
out-of-the-box is a compromise
Do not accept that a box had to exist in the first place.
Requirements:
- Strong hands-on engineers and researchers with deep technical substance,
and proven proficiency in at least 2 of the following:
MLIR
LLVM
Triton
- Equipped with Curiosity, sense of Ownership, and a relentless dissatisfaction with the current state of AI compilation
- Bonus - familiarity with the PyTorch ecosystem
BSc. in Computer Science, Computer Engineering, Mathematics, or any relevant scientific field (advanced degrees are an advantage)
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708832
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לפני 8 שעות
חברה חסויה
Location: Hod Hasharon
Job Type: Full Time
We are seeking an experienced C++ Developer with a strong background in building sophisticated systems to join our innovation group. This role focuses on developing a Browser Detection and Response (BDR) System aimed at enhancing browser security for users worldwide.
Key Responsibilities:
Design, develop, and maintain new complex C++ features with an emphasis on chromium browser security and internals.
Collaborate with teams across the world for productization
Contribute to the innovation and enhancement of security features within browser technologies.
Why Join Us:
Work on projects impacting billions of users.
Collaborative and innovative environment.
Competitive salary and benefits.
Requirements:
10 year C++ development experience
OS Low-level Knowledge, 3+ years of experience working with OS internal
Advantages:
3+ years working in large C++ codebases, over 1M lines of code (Open Source Projects - an advantage)
Security: 3+ years experience in building cybersecurity products (an advantage)
Skills
Strong communication skills and teamwork.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708822
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לפני 9 שעות
Location: Hod Hasharon and Haifa
Job Type: Full Time
Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.
Requirements:
BSc or higher degree in Computer Science/Engineering or related discipline from a leading university. (Alternatively, exceptional proven track record in similar tasks)
3+ years of experience in one or more of following disciplines: development of simulators/emulators for CPUs, definition of CPU features, HW/SW co-design, Low level performance profiling and optimization of SW with exposure to CPU ISA
Fluent spoken and written English
Behavioral skills: Team player. Interpersonal skills needed to collaborate with colleagues towards achieving a technical goal
Advantageous qualifications:
Experience in SW/HW codesign or in definition of new instructions will be a great advantage
Familiarity with dense compute workloads and analysis (e.g., AI, HPC, financial, etc.)
Familiarity with Vector Architectures
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708757
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 9 שעות
Location: Hod Hasharon and Haifa
Job Type: Full Time
we are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities:
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.
Requirements:
10-year experience in power-management architecture.
Experience in technical leading of cross disciplines (or HW-SW) development
Lead systemic changes across the organization
CPU core micro architecture knowledge is an advantage
Co-operate and communicate well with the architecture team and other members of development team
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the power-management solution
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8708749
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