דרושים » חשמל ואלקטרוניקה » Analog Layout Engineer

Our Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.

What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.

Our Networking Hardware team in Israel is looking for an experienced and skilled manager to lead hardware architecture team. The team leads the architecture of AI factory networking infrastructure for our next-generation servers focusing on accelerated performance while enabling optimized end to end GPU connectivity. Our Hardware architecture team innovative end-to-end connectivity solutions for AI factory, including switches, adapters, and optic interconnect integration into the GPU servers. Our products optimize data Center performance and deliver industry-leading bandwidth and scalability. Our products are focused on providing the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our DataStream acceleration.

We are looking for a hardware architecture Director to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead and manage the hardware next-generation end-to-end definition and architecture team, including switch, interconnect, and adapter components.
Shape the technology roadmap and strategy for next-generation hardware solutions.
Drive the vision for the hardware team, identifying needs and challenges for upcoming generations.
Facilitate communication with leadership teams and customers to ensure alignment and clarity.
Define key technical aspects, including form factor selection, signal integrity (SI), power and thermal considerations, and channel optimization (mechanical, thermal, cluster layout).
Coordinate alignment between hardware systems and chip design teams to achieve a unified definition.
Collaborate with cross-functional teams, including Engineering, Operations, and strategic vendors, to enable new technologies and products.
Be a hands-on leader, capable of independently driving new technology initiatives from concept to completion.

We are looking for a hardware architecture engineer to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead hardware next generation end-to-end definition and architecture (Switch, interconnect, adapter).

Define form factor selection; SI, power and thermal consideration, and channel optimization (Mech/thermal/cluster layout).

Align hardware systems and chip design teams toward unified definition.

Combine understanding of hardware end-to-end in parallel with Software aspects.

The position requires working closely with different Engineering and Operations teams

Looking for a Hands On Eng who is familiar with new technologies and can take a task from scratch to cocompletion with ease!

Required Physical Design Engineer
About The Position:
We design and builds hardware that fuels disruptive blockchain technologies by accelerating compute performance. Our world-class teams are transforming the future of data, creating the infrastructure that will power the next generation of secure, scalable, green computing. The main bottleneck in scaling cutting-edge solutions in privacy tech, data analysis, and real-time computing is acceleration existing hardware cannot keep up with data processing needs. Our products reshape how data is processed and used on a global scale, and were looking for the brightest people to join us. We are seeking talented and driven individuals to become part of our Yoqneam IC team.
Responsibilities:
Floor Planning Top to Bottom & Bottom up Block level. Exploring different floorplan structures to achieve both the best area & ease of convergence.
Generate high-quality PnR results for one or more digital blocks by applying engineering best practices.
Optimize designs based on key metrics, including power, area, and performance trade-off analyses.
Drive sign-off timing convergence for high-performance designs at the block level, including DRC and LVS signoff
Analyze power integrity (EMIR) results of blocks and apply corrective measures to resolve identified issues.
Collaborating closely with frontend, verification, architecture, physical design, and analog teams.
Work closely with EDA (Electronic Design Automation) vendors on the latest tool feature development and qualification.

We are leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables outstanding creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. We are looking for excellent people like you to help us accelerate the next wave of artificial intelligence.

We are looking for a skilled, creative, and highly motivated Senior PHY System Engineer to join the End-to-End (E2E) physical-layer performance team, as part of the Post-silicon department

What youll be doing:

End-to-End responsibility on the link level performance characterization, verification, and debugging.

Debugging of link issues of NVIDIA systems, while diving into the product HW design and SW/FW operation.

Characterizing optical and electrical performance using lab equipment and SW tools.

Take an active part in silicon bring-up while managing E2E testing of newest ASICs, with the objective of driving product to mass production with first-in-class performance.

Characterizing products performance using lab equipment, such as oscilloscope, Spectrum/Network analyzer, Pattern-generator, etc.

Working in front of various test teams, with the responsibility of addressing issues and monitoring the test flows conducted by them

Leading data-driven discussions about the product functionality and areas for improvement.

Testing NVIDIA Electro-Optical and Electrical chips and systems.

Defining testing requirements for new products based on electrical and optical specifications.

We are seeking an experienced QA engineer to join our SW/FW testing team. This position will be part of our growing team, which enables our products to meet the industry-leading benchmarks of efficiency and quality. We develop a collaborative and inclusive work environment, where ideas are shared and innovation is encouraged. As a QA Engineer in this group, you will be immersed in the latest advancements and actively contribute to developing world-class products. Your efforts will directly impact the performance and quality of our offerings, ensuring they consistently meet industry-leading standards. We are looking for an ideal candidate with proven QA experience who will be actively involved in testing industry-leading features in the Networking sector, can acquire new feature knowledge, conduct both manual and automated tests, and contribute to the development of automation systems. The ideal candidate should bring a robust understanding for SW release cycle and the QA part in it.

What you'll be doing:
Review arch design and requirements documents for new features introduced in several domains like Infiniband and Ethernet Switches and NICs, our GPUs, NVLINK, Linkx and more.
Design, develop, and perform tests for the new features, as part of FW GA or update releases.
Automate newly added tests in the existing automation framework, and add new capabilities and features to the framework.
Report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by R&D team, and raise if not fixed.
Conduct tests in various areas, including regression, performance, functional, and security. Keep track of testing progress and generate summary reports of testing activities.
Fully collaborate with different external teams like : :product marketing, R&D, and verification.
Define and build setups topologies for appropriate product coverage.

We are looking for a Validation and Verification (V&V) Engineer to join our team and play a key role in system testing for multidisciplinary IoT products within our Water Management Ecosystem.
Main Responsibilities:
● Designing a testing strategy, creating test plans based on system requirements
● Writing tests ready for automation
● Testing electrical, functional, communication, and integration aspects of a product throughout its life cycle
● Writing test reports, Fault documentation, verification of resolved issues,
● Participating actively in integration activities and complex failure analysis
● Working closely with the departments of Software, Firmware, Hardware, and Mechanical Engineering as well as System Engineering