You'll be joining our Front-End Design team, which is at the center of the silicon development. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.
We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
You'll be joining our Silicon One group which is the center of our ASIC design. You'll be part of our Group driving our game-changing next-generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporation. Our design center is very unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!
Requirements: Minimum Requirements:
B.Sc/M.Sc in EE from a top university.
RTL designer experience.
Familiar with UVM and functional testing.
Preferred Qualifications:
Experience in Matlab simulations and Bit Exact environments.
Familiar with mixed Signal systems/environments.
Knowledge & experience with Clock Domain Crossing.
This position is open to all candidates.
