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testing electro-optical and electrical chips and systems.
link-level performance characterization, verification, and debugging.
responsibility for complicated setups establishments, covering both optical and electrical components
characterizing optical and electrical performance using lab equipment and sw tools.
take an active part in silicon bring-up while managing e2e testing of the newest asics, with the objective of driving product to mass production with first-in-class performance.
characterizing products performance using lab equipment, such as oscilloscope, spectrum/network analyzer, pattern-generator, etc.
working in front of various TEST teams, with the responsibility of addressing issues and monitoring the TEST flows conducted by them

we are looking for a hardworking and engaged senior QA SW engineer with experience in networking to join the system ethernet QA team! our QA team is responsible to TEST and qualify the nvidia ethernet switches solutions. we learn new features, design, execute, write automation based on Python!  widely considered to be one of the technology worlds most desirable employers. we have some of the most forward-thinking and hardworking people in the world working for us. if you're creative and autonomous, we want to hear from you!
what you'll be doing:
review the arch design and requirements for new features introduced in the product.
design, develop, and execute tests for the new features, as part of sw ga releases and update releases.
report bugs found during execution, assist with reproduction and debugs in order to understand root cause verify bug fixes provided by the r&d team, raise if not fixed.
execute system tests in different scopes: regression, performance, functional, security for ethernet protocols.
write automation tests and framework apis based on the Python language.

the manager will be leading various type of reliability testings of nvidia ics, and responsible on nvidia reliability labs, which is a multi-millions $ worth of equipment as well as activities such as iqc, oqc, ic inventory managing and shipments.
this will include ate (automated TEST equipment), systems & evaluation boards and reliability equipment.
full management a team of technicians and operators, including day to day management, prioritization, focal reviews, and training.
maintaining and operating laboratory equipment such as ic ate, htol systems, scopes, dvms and other tooling, minimizing down time for all.
providing excellent support to engineers and our internal customers, carrying out q&r tasks and following strict execution methodologies.
establishing/maintaining a comprehensive engineering lab stock, apply skills to automate complex tasks and improve team productivity and efficiency.
entering and maintaining a database of work procedures and TEST data and reading schematics of electronic circuits.
building, updating, and improving lab processes and procedures while following and ensuring strict safety procedures and safety checks.

mentor new team members and enable existing team members to thrive.
support new ai fabric technologies based on nvidia networking solutions.
gain our customers trust, understand their needs, and translate them into technical actions and priorities.
work closely with multiple r&d teams from broad disciplines.
drive cooperation and alignment between ae, r&d, sales, business, and operations.
solve complex, highly visible customer issues across hw, fw, system and lead them to closure.
provide clear, constructive feedback to engineering and product/marketing on product requirements and quality.
own and improve methodologies, best practices, and debug flows used across the team.

architect end-to-end system validation strategies for new hardware platforms.
define TEST coverage and validation methodologies.
collaborate with hardware, software, qual and QA teams to align on product requirements and TEST coverage plans.
lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.
analyze TEST data to identify root causes, guide debug efforts, and improve validation coverage.
provide technical leadership and mentorship across multidisciplinary teams and represent system TEST considerations in architecture and design reviews.

leading the development of groundbreaking microelectronics packaging for networking business unit's future products
collaborating with world-leading vendors to develop highly ambitious packaging solutions
thriving in a dynamic and challenging environment

we are looking for a senior formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of nvidia's core technology.
you will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

our company networking division is looking for an excellent verification and validation system product engineer! our networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. 
what you'll be doing:
define TEST strategy
design, implement, and execute validation plans for the infrastructure system.
write efficient, maintainable, and high-quality unit tests for new features and existing codebases
automate infrastructure testing processes to improve validation efficiency.
identify potential bottlenecks, vulnerabilities, and failure points within the infrastructure and recommend corrective actions.
enhance validation efficiency through continuous monitoring and optimization.
troubleshooting and streamline/optimize our testing procedures.

what you will be doing:
work closely with the architecture and different software design teams.
implement new features in the core of nvidia nic firmware in pre and post silicon environment.
develop verification tests for advanced features in a highly complex and sophisticated firmware testing environment.
gain a deep understanding of system debug, networking technology and stacks, as well as the hw/fw/sw relationship.
you will learn how a big software project is operated, maintained, qualified and released, and how hardware and firmware are developed.

we are looking for a senior cad - Hardware Engineer to join our system design automation team. this key position includes leading the support for the mcad, ecad and le design teams in the hardware organization. in addition you will be developing software to increase the efficiency of our design teams.
 
our company networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of sectors including high performance computing, enterprise, data centers, cloud computing and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. our product line is focused on delivering the most optimized ethernet solutions for industries like media and entertainment as well as any other industry that can benefit from our datastream and tcp/ip acceleration. 
 
what youll be doing: 
lead the support of ecad, mcad and le design teams.
define and implement software solution in eda 's environment.
define and implement software solution in web environment.
working in cooperation with global teams in our company.

what you'll be doing:
support and develop solutions that will improve the efficiency and quality of the mixed-signal group.
define, develop, and maintain in-house, along with industrial utilities, solutions for schematic, layout, package and physical-verification in the fields of costume and eda vendor tools (cadence virtuoso, mentor calibre, synopsys icv and more), environment, and general-purpose solutions.
write, customize and debug icv/calibre runsets of drc, lvs, ext.
skill coding including pcells development.
scripting and programing for ad-hoc solutions and wide tasks solutions.
work closely with nvidias world-wide mixed-signal and technology teams.

join our company outstanding team and contribute to our legacy of innovation in the senior quality data analyst engineer role! at our company, we are dedicated to pushing the boundaries of pioneering technology. the senior data analyst engineer will lead advanced data analysis and optimization for networking products in mass production. the successful candidate will leverage technical expertise and manufacturing experience to deliver actionable insights from complex datasets.
what you'll be doing:
develop automated dashboards, kpis, and reports to monitor production health, yield, TEST results, quality trends and customers satisfaction indicators
identify and drive root cause analysis of anomalies or degradations in key metrics (yield loss, reliability issues, field returns, customers complaints).
collaborate with cross-functional teams in different time zones (such as manufacturing, TEST engineering, r&d, quality and sales).

we are looking for a chip design micro architect for the networking silicon group.as a chip micro architect at our company networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art bluefield dpu SOC and/or connectx nic that deliver breakthrough networking, security, cloud, ai and Storage performance to the ai data centers. as a design micro architect, you will make a real impact in a dynamic, technology-focused ai company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
you will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption
break high-level arch requirements into lower-level design building blocks. focal point for the design team, reviewing implementation and guiding the team.
find bottlenecks early in the development cycle using performance analysis and simulations
use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues