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Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage and networking at large-scale. We aim to drive innovations and deliver software defined infrastructure and algorithms to HPC, AI/ML, and Big Data applications.
We are looking for outstanding candidates with hands-on experience in development and optimization of AI frameworks. If you are a team player with excellent communication skills and motivation to revolutionize application performance, youre welcome on board!
What will you be doing?
Work as part of an innovative research team to analyze, develop, test and deploy improvements that enhance Huaweis distributed AI framework.
Develop optimizations that leverage hardware accelerator capabilities, minimize communication overhead and improve training/inference throughput
Push the boundaries of the state of the art in LLM performance and efficiency, including model compression and quantization
Analyze, profile and optimize the latest LLM AI algorithms, and implement as production-quality software libraries for latency-critical use-cases on next-generation hardware.
Work in a distributed computing environment to optimize for both scale-up (multi-device) and scale-out (multi-node) systems
Utilize advanced concepts such as Uncertainty Quantification, Mixed Precision Computing and Model Sparsity to improve performance and enable training of very large AI models
Collaborate with partners from top universities, and open-source communities to conduct state-of-the-art research.

Job Responsibilities:
1. Responsible for the exploration and introduction of open academic resources in the ICT and related fundamental theory fields in the region, including academic papers, academic activities, competitions, open datasets, etc..
2. Develop targeted resource expansion strategies based on the characteristics of the regional academic ecosystem (e.g., top local universities, research institutions, industry alliances) to enhance the platform's academic influence locally.
3. Monitor regional academic trends, identify high-value collaboration opportunities (e.g., regional academic conferences), and promote resource alignment and implementation.
4. Resolve regional issues in the resource implementation process (e.g., data compliance, localization of copyright agreements, language adaptation, etc.).
5. Collaborate with cross-functional teams to organize regional academic activities (e.g., technical seminars) to enhance Chasparks brand penetration in the local academic circle.
6. Establish a regional expert network (e.g., scholar advisory board, review committee) to support platform content quality assessment and resource screening.

our company, Huaweis Tel Aviv Research and Innovation Center, is looking for an experienced software engineer with expertise in Linux kernel development to join our Future-Computing-Infrastructure expert group. The group designs and develops technologies for the next-generation data center aimed at accelerating applications, optimizing compute resource utilization, and reducing data-center costs. Our projects involve hardware and software architecture co-design. They require high-level system understanding, creativity and innovative thinking.
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!
What will you be doing?
Design and develop Linux kernel code related to virtual memory management
Research, design and innovate methods, algorithms and supporting data-structures for data caching and prefetching
Participate in research to analyze application performance, identify bottlenecks and optimize various decision-making mechanisms based on benchmarking results
Collaborate with professional team members and various global teams around the world on a daily basis
You will have to think outside of the box and come up with creative ideas to deal with complex challenges within Linux kernel.

Perlis Cyber Protection Labs is responsible for researching innovative breakthrough product-oriented technologies for various cyber security products such as EDR, SASE, Threat Intelligence and more.
We are seeking an experienced C++ Developer with a strong background in building sophisticated systems to join our innovation group. This role focuses on developing a Browser Detection and Response (BDR) System aimed at enhancing browser security for users worldwide.
Key Responsibilities:
Design, develop, and maintain new complex C++ features with an emphasis on chromium browser security and internals.
Collaborate with teams across the world for productization
Contribute to the innovation and enhancement of security features within browser technologies.
Why Join Us:
Work on projects impacting billions of users.
Collaborative and innovative environment.
Competitive salary and benefits.
Flexible Hours Full or part-time, ideal for students!

our company, Huaweis Tel Aviv Research and Innovation Center, is looking for an experienced hands-on software architect with expertise in Cloud, AI, and Distributed Systems to join our AI-accelerated Cloud Storage group. The team designs and develops cutting-edge cloud technologies that power next-generation AI applications, optimizing performance, scalability, and efficiency.
The role involves both high-level system understanding and low-level grasp of the connection between storage and AI, to push the boundaries of cloud infrastructure for AI workloads. If you want to be part of something bigger, if you are a team player with excellent communication skills and the motivation to revolutionize AI-driven cloud technologies, youre welcome on board!
What Will You Be Doing?
Research, design, and innovate cloud-based AI acceleration technologies
Analyze AI application performance, identify bottlenecks, and optimize decision-making mechanisms
Collaborate with other engineers to develop AI optimizations, Storage backend and related POCs.
Investigate global trends in AI infrastructure and cloud computing to shape long-term architecture
Collaborate with global teams on next-generation cloud solutions for AI.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

We are a Database Security team, part of the Gauss unit, responsible for developing the next generation of databases at our company. Our team focuses on researching and developing innovative database security solutions while working with advanced technologies such as:
AI/Machine Learning
Zero Trust
Cloud Computing
Data Sharing & Collaboration.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.

we are Huawei's Tel Aviv Research and Innovation Center, where we pioneer next-generation data center technologies. Our Future-Data-Center-Infrastructure group specializes in co-designing hardware and software architectures that accelerate AI workloads, optimize resource utilization, and reduce operational costs.
Working at the intersection of academic research and practical implementation, our team develops cutting-edge solutions for AI infrastructure challenges, with a particular focus on Generative AI and large language models (LLMs). We pride ourselves on fostering an environment where system-level thinking, innovation, and technical excellence drive our success in reshaping the future of data center technology.
Role Overview
As a Senior Gen.AI Infrastructure Engineer in our AI innovation team, you'll play a crucial role in advancing our LLM infrastructure capabilities, focusing on research, implementation and optimization of state-of-the-art solutions for model deployment and serving
What will you be doing?
Explore new directions and seek new opportunities for innovation through academic / industry trends tracking
Design and implement advanced optimization techniques for transformer-based models
Conduct research and stay current with academic developments in LLM optimization
Drive architectural improvements for large-scale model serving systems
Develop and optimize infrastructure components using PyTorch and other frameworks
Implement and optimize model serving solutions using frameworks such as vLLM, TGI, and MindIE
Collaborate with cross-functional teams to improve system architecture and performance.

Please submit your resume to be added to our student job database, and once a student position opens, we will be able to contact you if it's a match.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.