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our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer someone who is enthusiastic to join a growing and hardworking group of diverse individuals responsible for handling challenge high-speed circuits and networking interface designs. Our team is responsible for the development of the networking and connectivity solution for our company's High-Performance-Computing products.
What you'll be doing:
Mixed-Signal/Analog circuit design for High Speed circuit and I/O Interfaces
Solve challenges of circuit designs in advanced node CMOS FinFET processes
Take designs through productization and be involved in all stages of development, from concept to product
Work with multi-functional teams to optimize the designs.

We are looking for a senior HW Engineer to join the HW team to lead the design of our system hardware includes the development of cards and enclosures for compute, storage, and communication systems for space. Come explore space with us!

What You Will Be Doing:
Lead board design through all development stages: from definition to implementation, bring-up, qualification and final release.
Full responsibility for electrical specification, schematic design, components selection and layout considerations till board fabrication and assembly.
Extensive lab bring-up and debugging until the testing platform is efficiently implemented on the Production floor.
Combine an understanding of the electronics, FW and SW aspects into the accurate system architecture.
Collaborate with multidisciplinary R&D engineering teams.
Monitor environment testing.

we are looking for experienced product HW Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed optical communication devices! Come and be a part of a phenomenal company with an outstanding atmosphere while ensuring our optical products reliability and performance. we are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world. Are you a creative and self-derived engineer who is up for the challenge?
What you will be doing:
Work with Design and Manufacturing Engineering teams to develop the most robust test solution for mass production
Full responsibility for electrical specification, schematic design, components selection and layout considerations for our testing platforms
Developing test plans and coverage for future / current products
Work with process groups to improve or resolve test/yield/quality issues after release
HW lab debug.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part in flows development.

Responsibility:
Scope, design, and implement high-performance APIs and services.
Collaborate with engineers and product managers to deliver robust solutions in short development iterations.
Develop maintainable and clean code with heavy reliance on developer testing.
Make thoughtful trade-offs that consider business priorities, user needs, and a sustainable technical foundation.

our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
we are looking for a hardware architecture engineer to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.
What you'll be doing:
Lead hardware next generation end-to-end definition and architecture (Switch, interconnect, adapter)
Define form factor selection; SI, power and thermal consideration, and channel optimization (Mech/thermal/cluster layout)
Align hardware systems and chip design teams toward unified definition
Combine understanding of hardware end-to-end in parallel with Software aspects
The position requires working closely with different Engineering and Operations teams
Looking for a Hands On Eng who is familiar with new technologies and can take a task from scratch to cocompletion with ease!

We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect at our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.
What you will be doing:
Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.
Define the HW boot, clock and Reset architecture for Switch ASIC
Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.
our company's networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware features and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities.
What you will be doing:
Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for firmware architecture, system embedded software, user interface and high-level design.
Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.
Define the architecture of implementing physical layer standards into our company's ASIC devices.
Involved in standard bodies activities and definition of next generation protocols.
Define features for the phy layer, to exploit interoperability between different generations of communication.
Be involved in product definition and the high-speed protocols that the our company networking devices will support.
Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.
Become focal point for our ccompanys physical layer networking communication devices.

we are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

ISR Group leads the Autonomous Vehicle Experiments and Vehicle Technology Integration at our company: Brings-Up set of hardware and software systems for autonomous vehicles fleet, mechanical and systems design in vehicles, retrofitting the vehicles with integrated AV systems, managing the day-to-day autonomous experiments for internal and customer projects, developing the tools and data pipelines that enable validation and algorithm enhancements The positions require working On-Site
What will your job look like:
System Installation of our companys computerized systems in autonomous vehicle fleet
Mechanical installation of peripheral infrastructure from scratch on vehicle cables, crimping, soldering, wiring, drilling, screwing, sawing.
Disassemble & assemble cars elements: fenders, bumpers, wheels, seats, dashboard panels, mirrors etc.
Working with workshop power tools: driller, Griders, Saws
Basic Configuring and debugging of Computers, Networking and varied components
Troubleshoot issues with varied engineering discipline, including software, hardware, mechanical assembly, networking, operating systems, and power systems.

Our vision is to enable the autonomous vehicle dream with best in class, cutting-edge, imaging radar. We are looking for an Experienced RFIC/MMWIC Engineer to join the development of the next generation of RF silicons that are part of a Software Defined Radar. The group hosts a diverse team of scientists, engineers and developers to research, realize and bring to market innovative new silicons. You will be part of a winning RF design team in a fast-paced startup-like environment, working on many different RF and analog components of the RF silicons in the most advanced nano-scale Technologies.
What will your job look like?
R&D of RF chip design in a mass production process.
Time + Frequency domain analysis of RF circuits.
Complete the Design process from spec review to design and lab support.
Design of different RF passive and active structures in the chip level.
Interface with RF architects, hardware designers and test engineers.

The RFIC/Analog design groups in our company's Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization. To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement. We're looking for an Experienced CAD or Design Automation Engineer to develop our company's RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

The RFIC/Analog design groups in our company's Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization. To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement. We're looking for an Experienced CAD or Design Automation Engineer to develop our company's RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.