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The PerfTech team is looking for an outstanding Senior C++ Software Engineer to build the next generation of AI-powered developer tools. You will apply deep expertise in modern C++, systems architecture, performance, and debugging to extend our developer-tools ecosystem into the emerging world of agentic software. In this role, you will help develop Genie, our company-wide AI knowledge and developer-productivity service. You will build production-quality C++ components and integrations while contributing to agentic workflows and retrieval systems that help engineers find information, understand complex systems, and work more effectively.

What Youll Be Doing:
Architect and develop production-quality C++ components, APIs, and integrations for NVIDIAs AI-powered developer-tools ecosystem.
Build reliable, performance-sensitive systems connecting native C++ tools with Genies retrieval and agentic capabilities.
Design maintainable interfaces between C++ applications and AI services exposed through Python, MCP, REST APIs, and structured tool calling.
Contribute to agentic workflows, retrieval systems, ingestion pipelines, evaluation infrastructure, and enterprise integrations.
Drive technical initiatives from early exploration through production deployment, working closely with multidisciplinary engineering teams.
Mentor engineers and help establish best practices for production-quality AI-powered systems.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

The team leads the development of networking infrastructure for NVIDIA's next-generation data centers, focusing on accelerated performance while enabling optimized end-to-end GPU connectivity, focusing on datacenter-level optimized solutions for AI.

As a leader of our switch Hardware Engineering team, you'll guide, encourage, and drive a team of highly skilled hardware engineers, providing them with stimulating and ambitious assignments and enabling them to stay creative and motivated while delivering products on schedule.

What You'll Be Doing:

Build the best team to design and execute high-performance switch system from concept to mass production.

Be a key member of the technical leadership team developing world-class switch designs.

This position is hands-on and will require a deep understanding of all technical/engineering aspects of the project with intimate familiarity with the entire development flow. From a technical standpoint, you will lead and support engineering teams in the following areas: specification definition, electrical schematics, opto-mechanical design, component selection, layout guidance, hands-on lab testing, production processes, qualification workflows, micro-architecture development, verification, characterization, design for testability, cost optimization, reliability, and more.

Collaborate with and integrate all HW project disciplines: Board Design, Assembly Process, Mechanics, Thermal, PCB Layout, Process , Production Engineering, Software/Firmware, Procurement, NPI, and more.

Plan and oversee your teams work on multiple simultaneous development projects in coordination with the broader leadership team. Manage direct reports, set goals, provide coaching, conduct performance appraisals, plan careers, and make compensation recommendations.

Collect, examine, and filter requirements from internal customers such as marketing, software, and systems engineering to assemble a comprehensive plan of record for next-generation switches while planning resource allocation for projects and assign team members effectively.

Schedule projects, create realistic outcome estimates, and drive timely, successful execution for high-volume manufacturing.

Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.

You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.

Contribute to physical synthesis, place and route, optimization, and timing closure for complex VLSI designs.
Support design floor planning and implementation planning in collaboration with senior physical design engineers.
Analyze timing, congestion, power, area, and design-rule issues and help drive them toward closure.
Work with physical design verification flows, including LVS and DRC, to support clean implementation handoff.
Partner with cross-functional teams to debug implementation issues and improve backend flow quality.

Our HW team in Israel is looking for an experienced system/board designer to join the Hardware Switch Group. The team leads the development of networking infrastructure for our next-generation data centers focusing on accelerated performance while enabling optimized end to end GPU connectivity.

What you'll be doing:

Perform board bring-up, hardware validation, characterization, and system-level debugging in the lab.

Debug issues involving power, signal integrity, interfaces, components, firmware interactions, and system behavior.

Support productization, production-line stabilization, and hardware-related issues during mass production.

Read and analyze schematics, PCB layouts, component specifications, design documentation, and manufacturing data.

Define test strategies, develop validation plans, execute test procedures, and improve coverage and efficiency.

Collaborate closely with electrical, mechanical, thermal, firmware, software, system, manufacturing, and quality teams throughout the product lifecycle.

Provide technical leadership and hands-on support for critical hardware issues.

Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab