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our company Networking business unit is searching for outstanding Senior Manager to lead IC test labs, who will work in our company R&D labs in Yokneam.
As an IC Test lab manager, the candidate will be responsible for leading Test floors, reliability, IC SLT (System Level Test), IC Socket systems, and RMA test labs, activities, and tasks as well as managing a team of operators and practical engineers.
Candidate will lead a team performing various types of testing of our company ICs, on various ATE (Automated Test Equipment), reliability testers, ovens and stress machines, evaluation, SLT and socketed boards, as part of IC test, development, characterization, and validation activities.
This job allows you to work in a complex, exciting engineering environment handling challenging high performance IC testing activities (Large devices, high frequencies, high power and optical).
What you'll be doing:
Lead all our company Israel IC labs (2500 m²), equipment, hardware, storages, and activities, including managing 25-35 practical engineers, and operators
New equipment installation & acceptances, also improve existing equipment up time
Collaboration with our company internal development, engineering, operational teams, and equipment vendors
Handle infrastructure stability to enable lab activities with maximal utilization.
Be a key part of IC test Engineering team, collaborating with Contract manufacturers, internal engineering groups to handle global test equipment activities.
Providing excellent support to engineers and our internal customers, carrying out challenging testing tasks and following strict execution methodologies.
Defining maintenance, routines, and monitoring processes and implementation on IC labs
Establish, train, and maintain a robust engineering infrastructure support process to enable high challenges solutions in IC test environment.

we are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our companys next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.
What you'll be doing:
Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.
Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.
Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.
Balance innovation with hands-on engagement in daily DV issues keeping a strong connection to real-world challenges and support needs.
Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.

We are now looking for a Chip Design Verification Engineer. we are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.
What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

Do you want to take part in accelerating the networking solution across our company's product portfolio?
our company Co-packaged silicon-photonics group seeks a dedicated R&D engineer to join our lasers and silicon-photonics validation team.
We seek a skilled and experienced hardware or high-speed engineer to join our team.
The ideal candidate will have experience in high-speed testing of fiber-optic modules for telecom/datacom, laser development, and post-silicon verification.
In this role, you will execute post-silicon verification of electro-optical & electrical debugging of Silicon-Photonics-based chips and products of our company. You will work closely with the R&D team, with internal verification teams, architects, FW developers, board engineers, and other stakeholders to bring up, integrate, troubleshoot, diagnose, and resolve technical setups. This role requires hands-on experience and a deep understanding of high-speed transceivers, as well as excellent integration, problem-solving skills, and strong communication abilities.
What youll be doing:
You will lead the design of verification setups for bringing up and testing the new SiPh transceiver chips.
Develop and implement laser testing methodologies and procedures to perform laser testing and characterization, including modulation and noise measurements.
Provide technical support and assistance to manufacturers of silicon photonics testing platforms.
Troubleshoot and diagnose technical issues related to equipment, processes, and software.
Document experimental procedures, results, and findings accurately and comprehensively.
Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

We are looking for a Chip Design Verification Manager for developing the next generation DFT technologies.
As a Chip Design Verification Manager in the DFT team at our company, you will lead teams that verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position you will be responsible to lead verification teams in the the definition, flow and execution of verification of the DFT design, architecture and micro-architecture.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

we are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at our company works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.
Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation
Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.

we are looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

we are leading the way in groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars.
Come work for the team that brought to you NCCL, NVSHMEM & GPUDirect. Our GPU communication libraries are crucial for scaling Deep Learning and HPC applications! We are looking for a motivated Performance engineer to influence the roadmap of our communication libraries. The DL and HPC applications of today have a huge compute demand and run on scales which go up to tens of thousands of GPUs. The GPUs are connected with high-speed interconnects (eg. NVLink, PCIe) within a node and with high-speed networking (eg. Infiniband, Ethernet) across the nodes. Communication performance between the GPUs has a direct impact on the end-to-end application performance; and the stakes are even higher at huge scales! This is an outstanding opportunity for someone with HPC and performance background to advance the state of the art in this space. Are you ready for to contribute to the development of innovative technologies and help realize our company's vision?
What you will be doing:
Conduct in-depth performance characterization and analysis on large multi-GPU and multi-node clusters.
Study the interaction of our libraries with all HW (GPU, CPU, Networking) and SW components in the stack
Evaluate proof-of-concepts, conduct trade-off analysis when multiple solutions are available
Triage and root-cause performance issues reported by our customers
Collect a lot of performance data; build tools and infrastructure to visualize and analyze the information
Collaborate with a very dynamic team across multiple time zones.

we are leading groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU -- our invention -- serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables groundbreaking creativity and discovery, and powers inventions that were once considered science fiction, including artificial intelligence to autonomous cars. Come work for the team that brought to you NCCL, NVSHMEM & GPUDirect. Our GPU communication libraries are crucial for scaling Deep Learning and HPC applications! We're seeking a Senior Software Architect to help co-design next-gen data center platforms and scalable communications software.
DL and HPC applications have a huge compute demands and already run at scales of up to tens of thousands of GPUs. GPUs are connected with high-speed interconnects (e.g. NVLink, PCIe) within a node and with high-speed networking (e.g. InfiniBand, Ethernet) across nodes. Efficient and fast communication between GPUs directly impacts end-to-end application performance. This impact continues to grow with the increasing scale of next generation systems. This is an outstanding opportunity to advance the state-of-the-art, break performance barriers, and deliver platforms the world has never seen before. Are you ready to build the new and innovative technologies that will help realize our company's vision?
What you will be doing:
Investigate opportunities to improve communication performance by identifying bottlenecks in today's systems.
Design and implement new communication technologies to accelerate AI and HPC workloads.
Explore innovative solutions in HW and SW for our next generation platforms as part of co-design efforts involving GPU, Networking, and SW architects.
Build proofs-of-concept, conduct experiments, and perform quantitive modeling to evaluate and drive new innovations.
Use simulation to explore performance of large GPU clusters (think scales of 100s of 1000s of GPUs).

we are leading the way in groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars.
Come work for the team that brought to you NCCL, NVSHMEM & GPUDirect. Our GPU communication libraries are crucial for scaling Deep Learning and HPC applications! We are looking for a motivated Partner Enablement Engineer to guide our key partners and customers with NCCL. Most DL/HPC applications run on large clusters with high-speed networking (Infiniband, RoCE, Ethernet). This is an outstanding opportunity to get an end to end understanding of the AI networking stack. Are you ready for to contribute to the development of innovative technologies and help realize our company's vision?
What you will be doing:
Engage with our partners and customers to root cause functional and performance issues reported with NCCL
Conduct performance characterization and analysis of NCCL and DL applications on groundbreaking GPU clusters
Develop tools and automation to isolate issues on new systems and platforms, including cloud platforms (Azure, AWS, GCP, etc.)
Guide our customers and support teams on HPC knowledge and standard methodologies for running applications on multi-node clusters
Document and conduct trainings/webinars for NCCL
Engage with internal teams in different time zones on networking, GPUs, storage, infrastructure and support.

We are seeking an experienced and highly motivated Lab engineer to run the planning, build-out, and operation of our state-of-the-art laboratory environments.In this role, you will drive the design and setup of lab infrastructure to support cutting-edge hardware and software development, ensure compliance with the highest safety standards, and oversee inventory and operational excellence.You will collaborate closely with lab engineering, research, and facilities teams to enable innovation at scale.
Join us on this exciting journey as we build and operate state-of-the-art lab environments that empower innovation and discovery.
What Youll Be Doing:
Plan, design, and manage the construction and commissioning of new lab spaces to support advanced R&D activities.
Develop and enforce lab safety protocols in accordance with organization policies and relevant regulations.
Oversee day-to-day lab operations, ensuring that all equipment, systems, and processes are running smoothly.
Manage lab inventory and procurement processes, including sourcing, vendor management, and stock control.
Supervise maintenance, calibration, and certification of lab equipment and infrastructure.
Support engineering teams with technical setups, system configurations, and troubleshooting.
Lead and mentor lab operators and support staff, fostering a culture of safety, quality, and continuous improvement.
Maintain accurate documentation, reporting, and compliance records.