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We are looking for an HPC and AI Data Center Engineer to join the networking cloud solutions HPC/AI Infrastructure team. We are focused on building supercomputers and HPC clusters based on groundbreaking technologies. We are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing. Take part of building large-scale compute and Deep Learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.

What you will be doing:

Plan and build complex cluster and supercomputers in various of data center and labs.

Rack stack and cable management to ensure efficient use of space and easy maintenance.

Ensure data centers and labs power and cooling efficiency while optimizing rack space utilization.

Data centers and labs daily operation and support.

Installations for variety of infrastructure and solutions - Cloud, VMs, Storage, Network, HPC and AI.

Perform troubleshooting - network, optic cabling, bare metal, operating system.

Support Research & Development activities.

We are seeking an AI Networking Architect to join the Networking Research Group. This role will help bridge the gap between emerging tasks supported by advanced technologies and the data center infrastructure that powers them. In this role, you will work at the intersection of AI applications, distributed systems, networking hardware, and software architecture.

You will join a focused team of multidisciplinary engineers driving AI workload optimization through deep application understanding, network analysis, and end-to-end systems thinking. Your insights will directly shape our products across the full stack - from applications and software libraries to hardware architecture and physical design.


What Youll Be Doing:

Model the performance of complex AI workloads to identify bottlenecks and recommend system-level optimizations.

Analyze brand-new AI models, distributed training techniques, and inference workloads to understand their infrastructure requirements.

Build Platforms, simulations and HW platforms, execute AI workloads and build analytical tools to evaluate trade-offs across compute, memory, storage, and network behavior.

Translate research insights and workload behavior into actionable software, hardware, and networking architecture requirements.

Partner with architecture, software, and product teams to influence future NVIDIA networking and AI infrastructure roadmaps.

Drive architectural innovation by applying deep workload analysis to real-world advanced machine learning frameworks.

We are looking for an excellent DevOps engineer to join the Switch and Firmware DevOps team and make a wide impact on the company products and teams worldwide. The role includes the development of cutting-edge design automation tools, build systems, and continuous integration systems. With your help, our supportive and friendly team will be able to focus on more exciting programming tasks, better serving the needs of our customers through new and improved CI processes. We work in a dynamic environment where multiple projects will be active at once and priorities may shift frequently.

We are looking for hardworking engineers who arent afraid of taking up new technologies, processes, and tools to make constant improvement in the automation infrastructure. The engineer will collaborate closely with our software developers as well as performance analysts to build and improve the world-class automation infrastructure.

What youll be doing:

Develop and support CI processes of various products.

Coordinate with various teams across the globe to promote and improve CI practices.

Build infrastructure for effective, high-quality development and release efforts.

Be a part of an experienced team with a great atmosphere.

We are looking for a Director from the FE ASIC domain to lead the Design Technology team. The team is responsible for driving AI-powered engineering productivity and developing, supporting, and operating the systems, tools, infrastructure, and automation solutions that enable the work of the design and verification teams in the networking ASIC group. A key objective is to maximize engineering productivity, design quality, and execution efficiency by accelerating the adoption of AI-assisted workflows, scalable automation, and advanced design technologies, while continuously evolving engineering tools and flows to meet the rapidly changing needs of AI-driven development. This position offers the opportunity to think outside the box and make a real impact on a dynamic, technology-focused company.

What You'll Be Doing:

Lead managers and team leads.

Collaborate with project leaders to define strategy, priorities, and execution plans across strategic programs.

Drive the development, deployment, operation, and adoption of design technologies, engineering infrastructure, automation, and AI-enabled solutions that improve chip design productivity, quality, and execution efficiency.

Evolve engineering tools, environments, and workflows to meet the changing needs of AI-driven development and design engineering.

Ensure high-quality support and enablement for internal engineering users through training, documentation, troubleshooting, and continuous service improvement.

Partner with methodology and engineering stakeholders to drive adoption and continuous improvement of design and verification flows.

We are leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables outstanding creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for excellent people like you to help us accelerate the next wave of artificial intelligence.

We are looking for a skilled, creative, and highly motivated PHY System Engineer to join the End-to-End (E2E) physical-layer performance team, as part of the Post-silicon department.


What youll be doing:

Testing our Electro-Optical and Electrical chips and systems.

Link-level performance characterization, verification, and debugging.

Responsibility for complicated setups establishments, covering both optical and electrical components.

Characterizing optical and electrical performance using lab equipment and SW tools.

Take an active part in silicon bring-up while managing E2E testing of the newest ASICs, with the objective of driving product to mass production with first-in-class performance.

Characterizing products performance using lab equipment, such as oscilloscope, Spectrum/Network analyzer, Pattern-generator, etc.

Working in front of various test teams, with the responsibility of addressing issues and monitoring the test flows conducted by them.

Our Networking business unit is looking for IC Reliability Lab manger, who will work in our R&D labs in Yokneam.

As an IC Reliability Test lab manager, the candidate will be responsible for leading all reliability test lab activities and tasks as well as leading a team of operators and practical engineers.

Candidate will lead a team performing various types of testing of our ICs, on various reliability platform, on ATE and evaluation boards, as part of reliability activities, design, production validation and IC characterization.

This job allows you to work in a complex, exciting engineering environment handling challenging IC testing activities.

What youll be doing:

The manager will be leading various type of reliability testings of our ICs, and responsible on our reliability labs, which is a multi-millions $ worth of equipment as well as activities such as IQC, OQC, IC Inventory managing and shipments.
This will include ATE (Automated Test Equipment), systems & evaluation boards and reliability equipment.
Full management a team of Technicians and Operators, including day to day management, prioritization, focal reviews, and training.
Maintaining and operating laboratory equipment such as IC ATE, HTOL systems, Scopes, DVMs and other tooling, minimizing down time for all.
Providing excellent support to engineers and our internal customers, carrying out Q&R tasks and following strict execution methodologies.
Establishing/Maintaining a comprehensive Engineering Lab Stock, apply skills to automate complex tasks and improve team productivity and efficiency.
Entering and maintaining a database of work procedures and test data and reading Schematics of electronic circuits.
Building, updating, and improving Lab Processes and Procedures while following and ensuring strict safety procedures and safety checks.

We are looking for a talented, fast learner, and highly motivated Chip Design - Verification Engineer. As a member of our Chip Design Team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, Verification environment coding and logic debug. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll be doing:

As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:

Understand and analyze uArch definitions.

Implement verification components to verify RTL meets specifications.

Collaborate with our RTL, Arch and uArch teams.

Work on logic related to switch design.