לוח משרות דרושים חשמל ואלקטרוניקה בחיפה וסביבתה

Requirements:
B.Sc./M.Sc. in Electrical Engineering from a top university
RTL design experience
Familiarity with UVM and functional verification methodologies

Requirements:
A recent Graduate with relevant Bachelors or Masters degree in Computer Science with GPA 85 and above

Fluent English Proficiency

Requirements:
B.Sc./M.Sc. in Electrical Engineering from a top university

​Minimum of 8 years of proven experience in a relevant field

RTL design experience

Familiarity with UVM and functional verification methodologies

Requirements:
6+ years of experience in digital logic design verification
Advanced knowledge of SystemVerilog and UVM
Strong debug skills both pre-silicon and in-lab

Requirements:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.

Requirements:
B.Sc or M.Sc Electrical Engineering or Computer Engineering graduate from leading Israeli Universities.

GPA above 87 (Please attach your grade sheet when applying to expedite the recruitment process).

You are an ambitious and motivated individual, who enjoys big challenges and can quickly ramp on multiple domains.

Requirements:
* Bachelors degree in Electrical Engineering or Computer Science.
* At least 6 years of experience in software development/validation.
* Developing complex software in Python/C++.

Requirements:
10-year experience in power-management architecture.
Experience in technical leading of cross disciplines (or HW-SW) development
Lead systemic changes across the organization
CPU core micro architecture knowledge is an advantage
Co-operate and communicate well with the architecture team and other members of development team
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the power-management solution.

Requirements:
B.Sc. in Electrical Engineering
Experience in defining architectures DSP/CPU/GPU processor cores is an advantage
Experience in HW acceleration of AI
Architecture modeling experience is an advantage
System C knowledge is an advantage
10+ years in VLSI architecture and design (less can be accepted in case of a unique candidate)
Skills
Good interpersonal skills
Very good technical skills
Team player
Creative
Independent and self-learning.

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
all you need is:
bsc/msc in electrical engineering, physics, materials engineering or related field.
5+ years of experience in semiconductor q&r, preferably with socs, asics, vlsi, or RF ics.
strong knowledge of semiconductor physics, packaging technologies, materials and reliability mechanisms.
knowledge and experience with RF reliability concerns.
experience with advanced packaging q&r (e.g., fccsp, fcbga).
hands-on experience with q&r TEST design and environmental stress testing.
deep understanding of failure prediction models, reliability simulations, and statistical analysis.
high proficiency in english, including strong verbal, reading, and writing skills.
expertise in automotive q&r standards, including aec-q100, iatf 16949, and jedec/iso/ieee protocols -advantage.
exposure to radar or adas/av automotive systems q&r - advantage.

Requirements:
all you need is:
bsc or msc degree in electrical engineering.
7+ years of experience as ic product/ TEST engineer.
hands on experience in bring-up & productization of complex ic products.
prior experience with teradyne ultraflex/ultraflexplus is - significant advantage.
deep understanding of structural dft methods (scan, mbist, jtag,).
proficiency in C / C ++ and scripting language ( PERL, Python,) in Unix environment.
experience with data and yield analysis using known statistical methods and tools (e.g. jmp).
familiarity with verilog and rtl behavioral simulations - an advantage
strong sense of ownership, commitment, and responsibility.
team player, with the ability to work in a rapidly evolving environment.
good interpersonal communication skills.