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Required Senior System Engineer
Job Description Summary
As a Senior System Engineer, you will play a critical role in the design, development, integration, and verification of complex medical imaging systems. You will be responsible for translating clinical needs into technical requirements, ensuring the robust performance, safety, and regulatory compliance of our innovative healthcare solutions.
Job Responsibilities
Lead and participate in the full product lifecycle, from concept and requirements definition through design, development, testing, and deployment of medical imaging systems.
Translate high-level clinical and user requirements into detailed system and subsystem specifications, ensuring traceability and comprehensive coverage.
Perform complex system analysis, modeling, and simulation to optimize system performance, identify potential risks, and propose innovative solutions.
Collaborate closely with cross-functional teams including hardware, software, clinical, quality assurance, regulatory, and manufacturing engineers to ensure seamless integration and successful product delivery.
Define and execute system verification and validation plans, including test protocols, data analysis, and reporting, to ensure compliance with medical device regulations (e.g., FDA, CE).
Conduct root cause analysis for system-level issues, propose effective corrective actions, and drive their implementation.
Contribute to the continuous improvement of system engineering processes, tools, and methodologies within the organization.
Mentor junior engineers and provide technical guidance on complex system engineering challenges.
Stay abreast of industry trends, emerging technologies, and regulatory changes relevant to medical imaging systems.

we are looking for an Emulation Engineer to join our Radar VLSI team and drive the development of next-generation ASIC Sensors.
We are developing best-in-class automotive radar solutions to complement our companys autonomous driving platform. Joining our expert team, you will leverage our companys unique assets to work on cutting-edge technology in a dynamic and challenging environment.
What will your job look like?
In this role, you will build high-end Emulation environments based on new designs. The position involves building and integrating complex components, working with cross-functional engineering teams, and developing systems that will change the way we drive.
We are looking for an engineer who thrives on challenges and is committed to engineering excellence while navigating complex constraints.
Lead Emulation development for the VLSI team.
Work closely with SW, Logic, and Verification engineers.
Serve as an expert matter for your domain, with full responsibility for driving and implementing improvements and new ideas.

we are seeking a highly motivated and dynamic Technical PM to join our Platform Software department and play a key role in shaping the future of autonomous driving systems.
This is a unique opportunity to work with top-tier engineering teams and take part in the development of our companys most advanced systems.
What will your Job look like?
Lead the end-to-end execution of project deliverables, including requirements definition, planning, execution, and delivery
Drive and participate in technical discussions, proactively remove obstacles, and act as both the unifying force within the team and the leader setting direction
Ensure timely and high-quality delivery of complex, multidisciplinary projects
Coordinate work across a large cross-functional organization, covering diverse aspects of the system: from algorithm acceleration to sensor integration, from OS development to advanced in-vehicle visualization
Represent the group in project-level forums, prepare status reports, and communicate effectively with senior management
Collaborate closely with R&D groups, engaging in technical discussions within a highly multidisciplinary environment.

our companys Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
In our company, Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5/6, PCIe Gen4/5, CDPHY, and MPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SIPI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our companys EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions and automation, validation SW tools development, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a Senior AI Modeling Architect to define and model the architecture of our next-generation AI processors. In this role, you will serve as a key technical authority - bringing not only strong modeling capabilities, but also the architectural vision to propose and drive end-to-end solutions to complex design challenges.
You will work at high levels of abstraction, partnering closely with HW and SW architects to co-invent optimal solutions, validate them through simulation, and influence design decisions based on experimental data.
Responsibilities:
Model CPU/AI processor functionality and performance using SystemC and pre-silicon simulation environments
Define and drive architectural solutions - not only identify problems, but come with concrete proposals and alternatives
Partner with lead HW and SW architects to co-design features and evaluate trade-offs across the stack
Analyze bottlenecks and performance on workloads reflecting future AI use cases
Provide proof-of-concept implementations for new architectural features and design alternatives
Potentially lead feature definition in addition to the modeling role

We are our company's Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stage and leave your mark as our company assumes full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like?
Work closely with the design teams from early stages of the design process to review DFX architecture and define test requirements.
Define test methodologies and generate test content for high-speed interfaces of embedded IP blocks (LPDDR4/5, PCIe Gen4/5, D/C/MPHY).
Test program coding, pattern conversion and pre-Si validation (virtual test simulations)
Support Load Board and Probe Card design activities.
Lead post-Si test program debug activities to enable delivery of samples to internal and external customers.
Test program characterization and tuning to enhance test program quality to meet automotive standards.
Support Quality & Reliability team to enable effective and timely qual plan execution.
Lead test deployment activities with tier-one Foundry and OSAT vendors to enable large-scale Wafer-Sort and Final-Test operations.

we are looking for a AI/ML Applied Researcher.
As AI Applied Scientist, youll be at the intersection of advanced technology and meaningful impact with clear business cases. You will have access to real-time (RT) big data from multiple Sensors & Data sources, and a chance to discover, explore, research, and develop cutting-edge solutions that directly impact industrial manufacturers around the globe. As part of the Applied AI/ML Science team, you will have the opportunity to continuously grow and learn while building and deploying advanced models directly into our products, and stay at the forefront of the technologies in the world, witnessing firsthand their impact on our customers.
A Day In Your Life:
Own the algorithm lifecycle from problem definition and data analysis to prototyping and delivering production-ready models.
Research, design, and build anomaly classification, predictive, insights, recommendations, and other types of models from various data sources, including sensor time-series data, textual data, images, and more.
You will Ensemble multi-modalities by exploiting and enriching the most from our data collections platform and feature extraction and store phases, using classic statistical methods, deep learning, Transformers, Graphs, Foundations Modules (as TSFM, Graph Transformer, TGNN), and any available technology to extract recommendations for taking real-world, life-changing actions.
Engage with customers and collaborate with our product team to develop innovative solutions utilizing new types of data.
Work with cloud-based big data platforms for training, distributed processing & experiments tracking (e.g., Metaflow, Grafana, Outerbounds, Databricks).
Partnering and contributing to modern technologies: LLMs and agents (GPT, Claude, Gemini), defining & building Gurdrails, reasoning chain as function call, planning, ML-based vectorization and embeddings, and stream analysis.
As part of our hybrid working policy, you will be expected to work from the office at least twice weekly, which includes at least one day in Haifa.