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Requirements:
* Minimum 5 years of experience in an enterprise IT helpdesk environment.
* Strong hands-on experience with:
* Microsoft Windows 11 deployment and support
* Microsoft Windows 7, 10 support
* Office 365 suite, Exchange Online, SharePoint Online, Teams
* Microsoft Intune, Microsoft Entra ID (Azure AD), and Microsoft Azure
* Active Directory (users, computers, and GPO management)
* Proficiency in:
* Computer hardware setup and troubleshooting
* client-side networking: TCP/IP, DNS, DHCP, VPN, Wi-Fi, and basic troubleshooting of switches, and firewalls
* PowerShell scripting for automation and troubleshooting
* Excellent communication skills in English and Hebrew
* Strong service orientation, self-motivation, and ability to work well in a team
* Strong organizational and documentation skills
* Fast learner, willing to expand knowledge in new IT technologies

Advantages:
* Maintain and support Palo Alto Networks firewalls (basic troubleshooting, connectivity, and user access).
* Experience using Freshservice
* Familiarity with Admin By Request or similar PAM tools
* Knowledge of or interest in IT automation and AI tools
* Experience with Linux (basic troubleshooting).

Requirements:
Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering.
2+ years experience in Analog layout
Experience in advanced technology nodes like 7nm and below - advantage.
Proficiency in scripting languages like bash, Perl, Skill, etc.
Prior experience with Cadence Virtuoso environment - advantage
Can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.

Requirements:
Minimum 2 years of experience in leading and managing engineering teams
B.Sc/M.Sc in Electrical Engineering
7+ years experience as Board Designer
Experience in layout, design bring-up and verification.
Strong communication and interpersonal skills
Preferred:
Experience in high power designs
Experience in control interfaces (e.g. PCIe, parallel and serial I/Fs )
Experience in memory devices designs (e.g. DRAM memories like DDR3/4)
Experience in production of boards/systems
Ability to independently learn, investigate and implement new technologies.

Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
47 years of experience in FPGA prototyping or emulation of ASIC/SoC designs
Strong understanding of digital design and RTL (Verilog/SystemVerilog/VHDL).
Hands-on experience with at least one emulation/prototyping platform (Palladium, Protium, Veloce, ZeBu, or FPGA-based)
Good knowledge of synthesis, timing closure, and design partitioning for FPGA/emulation.
Familiarity with verification methodologies and environments (UVM/SystemVerilog/C).
Experience with scripting (TCL, Python, Perl, or Shell) for automation.
Strong problem-solving and debugging skills.
Ability to work in a fast-paced, collaborative environment.
Excellent communication and teamwork skills.
Preferred:
Exposure to software bring-up, driver validation, or firmware testing on emulation.
Knowledge of bus protocols (Ethernet, DDR, etc.).
Experience with debug tools (waveform viewers, logic analyzers, or emulation debug frameworks).
Background in SoC architecture and hardware/software co-design.

Requirements:
B.Sc. in Electrical/Computer Engineering, Computer Science, or Practical Engineering (hands-on IC layout/CAD experience also considered).
13 years of relevant industry experience or 3+ years for more senior candidates both junior and experienced engineers will be considered.
Hands on experience with layout and verification tools, including both commercial (Cadence, Synopsys, Mentor) and in-house CAD solutions.
Strong programming skills in SKILL, Python, TCL, Perl, and Shell (Csh, Bash).
Ability to debug, optimize, and troubleshoot CAD flows and layout workflows.
Familiarity with regression testing, code review, flow validation, and CI/CD practices in CAD/EDA environments.
Strong communication and teamwork skills, with the ability to work independently in a dynamic, fast-paced environment.
Preferred:
Prior experience as a Layout Engineer or EDA/CAD Physical Design Engineer in a semiconductor environment.
Deep understanding of IC physical design and verification flows:
Custom analog/digital layout, floorplanning, placement, routing
DRC, LVS, ERC, parasitic extraction
Physical verification and tapeout readiness
Advanced SKILL programming for layout automation and productivity.
Experience with tapeout preparation, design rule integration, and physical verification.
Knowledge of PCells, parameterized devices, and layout generators.
Proficiency in physical verification runset programming and maintenance, including customization of DRC/LVS/ERC decks and integration into design flows.
Experience building automated regression environments for CAD/EDA flows in SKILL.
Experience with in-house CAD tool development and with the integration and customization of both in-house and commercial solutions.