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We are looking for a Senior Product Engineer to join a global team of a Product Engineers that own a technical success and customer satisfaction across multiple high-impact projects. This role is deeply rooted in data analytics; youll be working at the intersection of silicon, systems, and software to deliver high-value insights to customers.
Responsibilities
Performing post-silicon and system-level data analysis and providing insights on data extracted from post-silicon stages
Supporting customers with analytics platform problems solving and new features introduction
Drive integration of our companys analytics platform within customer environments, bridging silicon, test, and system-level domains.
Collaborate with R&D and data science teams to develop, validate, and improve advanced analytics algorithms.
Troubleshoot complex silicon/system issues through data-driven insights.
Partner with internal stakeholders (design, software, product) to influence roadmap and execution.
Act as a technical proffesional in customer onboarding, support, and ongoing engagement.

As formal Verification Engineer you'll own verification tasks from planning through execution, collaborating with experienced engineers across multiple teams to ensure design quality while meeting challenging timelines of the Graviton product line. This is an excellent opportunity for motivated engineers to grow their formal verification expertise in a supportive, high-impact environment.

Key job responsibilities:
Plan and execute formal verification plans under guidance from senior engineers.
Develop formal test-benches for design modules.
Debug formal verification failures and analyze root causes.
Collaborate with design and verification teams to resolve issues.
Learn and apply new formal verification methodologies and tools.

Joining our growing and versatile team, youll contribute to the development and verification of groundbreaking ML and Neural Network hardware. Collaborating with experts across global design centers, youll drive impactful projects and help deliver Arms next-generation IP using the most sophisticated tools and methodologies.

As a verification engineer, you will make a difference by influencing the verification strategy and methodology, taking ownership of complex work packages and driving them to success.

Required Skills and Experience:

Meticulous attention to detail, ensuring high-quality verification that minimizes bug escapes.
Shown experience in block-level verification using UVM or similar methodologies.
Strong knowledge of coverage driven verification for complex designs.
Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches.
Skilled in planning verification tasks and producing realistic effort and time estimates.

we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

We are looking for talented Engineers to join our Virtual Platforms team.
Virtual platforms play a crucial role in accelerating the development process by enabling early Software development, System-Level testing, and architectural exploration without the constraints of physical prototypes.

As a Virtual Platform Engineer, you will:
Develop accurate and efficient simulation models of hardware components.
Create and maintain Virtual Platform environments for software development and system-level validation.
Debug and optimize complex hardware-software interactions.

This role requires strong communication skills and a collaborative mindset, as you'll frequently interact with various teams across AWS to deliver optimal solutions.

If you are passionate about shaping the future of semiconductor technology and meet our qualifications, we invite you to join our dynamic team. Let's redefine what's possible together!

As Chief Engineer, you will be responsible for ensuring that all electrical, mechanical, and fire/life safety equipment within the data center is operating at peak efficiency. This involves planned preventative maintenance of equipment, daily corrective work, and emergency response. You are expected to be a singular focal point for all facility operations and to support Amazon within its owned and operated data centers.

You should be able to manage large scale impacting projects and new region support from conception to completion. These projects involve large amounts of independent work as well as collaboration with external support groups including engineering, automation, procurement, and finance in both local and global settings. As Chief Engineer, you will be tasked with creating and delivering on key milestones, obtaining and tracking quotes for all necessary costs, and documenting project results for future implementation at other facilities. The goals of such projects are for the Chief Engineers to drive innovation and resiliency while reducing operational costs in the facilities.

Key job responsibilities:
Train and support the Engineering team in their role of providing electrical and mechanical equipment troubleshooting and operations.
Implement and execute site or equipment-specific training exercises. Exercises cover, but are not limited to: stand-by diesel generators, switchgear, UPSs, PDUs, AHUs, chillers etc.
Oversee day-to-day operation and maintenance of mechanical and electrical equipment in data center sites.
Operate independently, with limited direct management.
Assist in the design and build-out of new facilities and perform root cause analysis of equipment failures.
Act as an escalation point for all facilities-related issues within the data center region. Work OT hours as needed to support site stability.
Troubleshoot and report facility and data sever-level events within internal Service Level Agreements (SLA).
Create and deploy standard practices for Engineering Operations Technicians, Chief Engineers, and vendor support teams.
Ensure all safety procedures are adhered to by vendors, and AWS staff.

As a System Lead Engineer in the Nitro team, you will be responsible for defining Annapurna Labs Network Interface Card (NIC) hardware. Following the development and validation of our NIC, and bringing the NIC to mass production.

Youll provide leadership in new technologies of the HW interfaces, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and youll work with technical experts, senior leaders, and multiple areas of technology.

Key job responsibilities
As Lead engineer youll get involved with the first architecture discussions and through design development, readiness to production until product exposure to customer. Youll handle hardware and software system related aspects, such as: architecture definition, mechanical design, thermal and power design, signal integrity of high speed interfaces (PCIe, High Speed Ethernet and DDR), boot flows, recovery flows, remote debug hooks, firmware live-update flows, system health monitoring sensor, report flow, etc... This is a fast-paced, intellectually challenging position, and youll work with thought leaders in multiple technology areas. Youll have high standards for yourself and everyone you work with, and youll be constantly looking for ways to improve your products performance, quality and cost. Were changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

In this role, you will be responsible for:
Work as part of a team to operate a large-scale test automation lab for multiple products
Test and integrate SW and HW deliveries from various global R&D teams, including manage, debug and failure analysis of automated tests
Automate manual tasks for the lab and collaborate with technology teams to migrate more setups to the lab
Constantly improve and innovate our lab procedures, HW setups and SW tools

As a member of our physical design team, you will be performing various electrical analyses at the block or chip level, including but not limited to Static/Dynamic IR, EM, Noise, and Signal EM.
You will work with the CAD/technology teams for flow bring-up and validation.
You will also collaborate with the implementation team during the entire chip design cycle to drive sign-off closure for tape-out.
You will handle schedules and support cross-functional engineering efforts.