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Are you ready to be part of a team that's pushing the boundaries of technology and innovation? At NVIDIA, we're leading the way in transforming computer graphics, PC gaming, and accelerated computing. We're now beginning the next era of modern AI computing. As a Backend Chip Integration Engineer, you will play a crucial role in building the future of our powerful technologies. This is an outstanding opportunity for those who are passionate about VLSI physical design and automation flows.

What you'll be doing:

Define chip interface and silicon interposer interface, focusing on their physical location and netlist.

Develop automation flows for chip integration and power grid implementation.

Perform power integrity analysis of the interposer power grid to ensure flawless performance.

Collaborate with cross-functional teams to successfully implement world-class solutions.

Contribute to the continuous improvement of our integration processes with your innovative ideas and expertise.

looking for a Hardware Engineer for our System Product Engineering group. The candidate will take full responsibility for networking systems product support engineering matters. The position requires an understanding of hardware, firmware/software, mechanical integration, and manufacturing. The candidate will supervise Product engineering activities in a various CM ( contract manufacturing ) lines, working closely with groups across the networking organization: Hardware/Software/Firmware R&D, Architecture, Test Engineering, Quality & Reliability, and Operations groups. The candidate will take part in direct communications with our internal and external teams. The position provides an opportunity to gain deep knowledge of our networking systems and a system-level view of our solutions, along with working in a dynamic and positive environment. ​

What you'll be doing:

Leading Cross-Organizational Task Forces: You will be responsible for managing and leading cross-functional teams to address quality events and failure modes in our networking products. This involves coordinating efforts from various departments, such as hardware, software, and manufacturing, to collectively work toward identifying and resolving issues.

Root Cause Analysis and Test Planning: You will perform in-depth root cause analysis by meticulously analyzing failure modes Monitor and control the test yield for all stations.

Onsite engineering support: you will be the technical owner for all test issues, test infrastructures, and test setup and will have to deliver fast and professional responses for all issues.

The workplace is located at the FLEX factory in Migdal Haemek, Israel.

We are seeking a dynamic and highly motivated Senior Software Manager to lead our software verification and automation for DOCA Networking SDK. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you'll be doing:

Lead teams of software verification engineers, providing technical direction, career development, and performance mentorship.

Define and continuously refine our software testing methodology and processes.

Engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team.

Lead the verification process, ensuring the functionality, stability, and performance of our DOCA networking SDK and the solutions on top of it.

Work closely with internal and external customers to understand system use cases.

Analyze coverage measures to identify verification gaps and provide data-driven insights into product development and release readiness.

We are looking for a phenomenal engineer to join the chip simulation team for networking chips and GPUs.

This simulation platform enables our engineers across firmware, SDK, and OS domains to develop and test their code without relying on physical hardware. If you're a creative, self-driven engineer passionate about systems-level design and eager to build technology that empowers internal teams, we want to hear from you.

What Youll Be Doing:
Develop and maintain simulation components for the physical layer of our high-performance networking chips (e.g., GPUs, switches, NVLink, Ethernet...).
Collaborate with chip architects, firmware developers, and hardware design teams to accurately simulate complex physical-layer behaviors in software.
Define, implement, and validate simulations of features such as link training, error injection, and transceiver behavior, making the simulation platform a go-to internal platform for development and debugging.
Extend and optimize the simulation infrastructure by contributing to CI pipelines, automated test frameworks, and regression tools.
Support internal users by debugging simulation flows and collaborating on bug resolution.
Take part in future-facing innovation by enabling simulation for next-generation devices and features.

We are looking for a Senior Signal & Power Integrity Engineer. We work closely with NVIDIA sites in USA and China and have access to extensive knowledge, technologies and tools. Yet we are responsible for our own product line of PHY ICs . Taking the products from concepting, through design, implementation, verification and release to customers. If you thrive working with highly skilled people that enjoy reaching challenging goals then NVIDIA in might be the perfect workplace for you. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle !

What you'll be doing:

Design high frequencies channels up to 400Gb/s per lane for PCBs, packages, connectors and cables.

Design layout guidelines for our systems.

Simulate passive and active elements in 3D and 2D simulation tools.

Measure systems in the lab using Network Analyzer, TDR and scope.

Master InfiniBand, Ethernet and PCI-Ex Layer 1 specifications and implementation methods.

Work in an intense environment and control multi-discipline expertise.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking for a System Test Engineer to join our System Test team, responsible for defining, developing and performing tests on a system level for our next-gen Wi-Fi products. Our team embraces modern development practices and tools to accelerate learning and delivery.

We are looking for a visionary Senior System Architect to lead the charge in defining how we move data at speeds the world has never seen. We want to bridge the gap between silicon and the rack, ensuring our NVLink and InfiniBand fabrics remain the gold standard for performance. This is a chance to join a team where we don't just follow industry standards-we set them!

You will work at the intersection of Signal Integrity (SI), Mechanical Engineering, and System Protocol design to ensure that our NVLink and InfiniBand/Ethernet fabrics scale to terabit-per-second speeds with industry-leading power efficiency and reliability.

What Youll Be Doing:

Architectural Definition: Lead the end-to-end definition of high-speed interconnect systems for next-gen AI platforms (e.g., Rubin and beyond), focusing on 224G/448G PAM4 lanes and beyond.

Technology Roadmap: Evaluate and select pioneering technologies such as Co-Packaged Optics (CPO), Silicon Photonics, and advanced OSFP/QSFP-DD form factors.

System Co-Design: Collaborate with ASIC, Thermal, and PCB teams to optimize the "Silicon-to-Connector" path, minimizing insertion loss and improving signal integrity.

Standardization Leadership: Represent us in industry standards bodies (e.g., IEEE 802.3, OCP, MSA) to influence the future of high-speed connector and cable specifications.

Vendor Ecosystem: Work with world-class connector and cable vendors to drive custom mechanical and electrical designs that meet our unique performance requirements.

Performance Modeling: Conduct trade-off analyses between reach, power, latency, and cost for various interconnect media (Copper vs. Optical).

We are looking for a Senior BLE Testing Automation Developer to join our Bluetooth Low Energy (BLE) system testing team. The team designs and develops a wide range of capabilities to support BLE system-level validation, including internal tools, end-to-end test systems, automation libraries, core infrastructure, and comprehensive test plans. These systems simulate real-world customer scenarios and support validation against BT SIG specifications.
In this role, you will design and develop new test plans and test cases for our BLE connectivity solutions, maintain lab infrastructure, and support validation activities across multiple projects and device families. You will analyze customer requirements, use cases, scenarios, and reported issues to ensure proper testing coverage, and validate that the system is compliance with BT SIG specifications and customer requirements. Your responsibilities will include design and integrating new BLE features testing into automated workflows, developing advanced test automation sequences, monitoring and generating test reports, design and reviewing test plans, and mentoring junior team members. This role requires proven test automation experience with embedded systems, strong technical problem-solving skills, collaborating with other software teams as needed, and may involve international travel for customer support.

We seek a highly motivated Network Performance Exploration Engineer to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for exploring and identifying critical network optimization opportunities across our entire hardware and software stack, analyzing how system-level changes impact application-level performance.

What Youll Be Doing:

Explore and validate end-to-end application performance, defining comprehensive test plans and critical metrics to identify optimization opportunities in both hardware and software.

Establish and maintain a comprehensive database of benchmark results, tracking performance across releases to drive data-informed decisions.

Conduct deep-dive analysis into communication libraries (like NCCL), system software, and hardware configurations to investigate performance characteristics, validate architectural theories, and identify bottlenecks.

Provide critical performance data to correlate and enhance simulation tools, ensuring our models accurately predict real-world hardware behavior.

Analyze application-level traffic patterns (e.g., LLMs) on our advanced networking fabrics to identify hardware and software optimization opportunities and tune system parameters.

Lead Proof-of-Concept (POC) projects to prototype and evaluate potential hardware and software optimizations and their impact on application performance.

We are looking for a Senior PCB Design Layout Engineer join the Hardware Layout team.

We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence. Make the choice to join us today.

What youll be doing:

Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all our business units (Information Network, GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI).

Complete development of CAD layout from detailed component placement, constraints management, with a concept of topology and signal and power integrity.

Be responsible for the design releases required generation of artwork files, ODB++, test reports, and electronic PCB documentation.

Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specification.

Change the world. Love your job.
Do you strive to understand how electronics work, and enjoy debugging, coding and/or solving technical problems? Here's your chance to innovate for the future! Applications Engineer Interns at our company are technical experts who are focused on leading-edge digital, mixed signal and analog products. We have a strong customer commitment and a great team spirit. If you are looking for an interesting and challenging position with a wide range of exciting responsibilities, you've come to the right place.
In this position, you'll work directly with TI customers to determine their major design challenges and partner with them on creating solutions that focus on ease-of-use and add value to their solution. You may also spend hands-on time in a TI lab tackling problems and delivering innovative development solutions that support our products and drive revenue.
Some of your responsibilities will include, but are not limited to:
Working with design, marketing, sales, and product definition teams to successfully launch new products into the market
Promoting TI products and providing appropriate technical solutions to customers to solve their design challenges
Providing technical support to customers by reviewing designs, debugging problems, and answering questions.

We are looking for a best-in-class Chip Design - HW Emulation Senior Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. Join NVIDIA's world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Connecting emulator/FPGA based solutions to real external H/W or virtual targets, taking care of complex testbench and different protocols.

This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, scripting, and lab-based bring up of the design.