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We are the world leader in automotive and driving assistance systems, developing the world's most advanced software technologies and hardware architectures.
our group is located in haifa and is responsible for enabling the deep learning and computer vision algorithms on the platform. the technology we develop enables state-of-the-art deep neural networks to run efficiently in vehicles - contributing to saving lives and enabling autonomous vehicles. this is an exciting opportunity to work with highly talented engineers and be a part of a product with a lot of innovation and work on cutting-edge compiler and optimization technologies in the ai domain.
what will your job look like?
shape our product by applying cutting-edge deep learning network optimization techniques and will have the chance to influence future generations of our hardware and software
develop a deep learning compiler stack that takes neural network descriptions created in frameworks such as tensorflow and pytorch and converts them into code suitable for execution on custom-built our hardware
use state-of-the-art open-source technologies such as mlir and work closely with the open-source community
develop optimized implementations of a variety of neural-network operations and new optimization techniques and algorithms to efficiently map ml models onto our state-of-the-art systems
develop a toolchain that will provide a quantum leap in deep learning capabilities and performance.

we are seeking a skilled failure analysis (fa) engineer with expertise in x-ray inspection techniques to join our av platform team. the ideal candidate will specialize in using advanced x-ray imaging and other analysis methods to investigate product failures, identify root causes, and provide actionable insights to improve product quality and reliability what will your job look like?
perform detailed failure analysis using x-ray imaging systems and related diagnostic tools to inspect electronic components, assemblies, and materials.
interpret and analyze x-ray images to detect structural anomalies, defects, voids, cracks, delamination, and other failure mechanisms.
develop and optimize x-ray inspection procedures and protocols for failure analysis and quality control.
prepare TEST specimens: cutting, mounting, grinding, polishing and chemical etching
collaborate with product engineering, Quality Assurance, and manufacturing teams to support product development, troubleshooting, and continuous improvement efforts.
prepare detailed technical reports documenting findings, root cause analyses, and recommended corrective actions.
support reliability testing and failure mode analysis for new and existing products.

Our SOC verification group owns the important and challenging job of verifying mobileye's chip. it is involved from product specification to final SOC delivery, and involves all the system components. the group is made up of few of the best Verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
what will your job look like:
you'll be responsible for pre-silicon system -level verification of the most cutting-edge ai accelerators and technologies in the automotive field.
define the testplan, develop and run tests on simulation/emulation environments, develop TEST environment and verification collaterals.
you'll have a broad effect on our unique product from the very beginning of the process.

Our autonomous driving software group in looking for an experienced Linux Kernel & security Developer to design and implement secure Embedded software solutions. this is an exciting opportunity to work with highly talented engineers and contribute to cutting-edge security innovations in automotive technologies
what will your job look like?
you will research, design, and implement Linux Kernel drivers and os features, ensuring compliance with security best practices.
maintain and enhance existing Kernel components while mitigating potential vulnerabilities.
integrate Embedded software solutions in our automotive platforms, including hw bring-up, debugging, and unit testing.
conduct threat modeling, penetration testing, and vulnerability assessments for Linux -based Embedded systems.
optimize memory management, i/o, networking, and Storage security within the Linux Kernel.

which department will you join?
our hw team - a group designing the eyeq chips for adas and autonomous cars. the group is responsible for all disciplines of development, including but not limited to logic design, design verification, microarchitecture, analog and circuit design and layout, physical and structural design ( backend ), product and TEST engineering.
each physical design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & rtl modifications to achieve converges were looking for a physical design engineer to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

we are a multidisciplinary development team working on a cutting-edge autonomous driving project, at the forefront of automotive technology. the team develops complex ecus that combine multiple socs, low-level firmware, hardware, validation, and automation systems, enabling next-generation autonomous capabilities. we work closely with hardware, system, verification, and automation groups to bring up, debug, and validate advanced automotive platforms from early development stages through production. this is a highly technical, hands-on environment focused on solving real system -level challenges.
what will your job look like:
debug complex hw/fw and system -level issues in an autonomous vehicle platform
perform deep root-cause analysis across firmware, hardware, and automation systems
lead firmware bring-up, integration, and debug of ecus with multiple socs
debug and support automation systems, including lab automation and fw verification environments
analyze failures originating from automated TEST systems and distinguish between fw, hw, and TEST infrastructure issues
work closely with hw, system, validation, automation, and architecture teams
support issues from early development stages through production and field failures
contribute to firmware debug methodologies and verification strategies
provide technical leadership and mentoring when needed.

We are at the forefront of developing autonomous driving systems with leading oems, by integrating our state-of-the-art ecus into various vehicles. we are seeking a Embedded systems software architect to own the technical direction of our Embedded software platforms. this role combines hands-on development, system architecture, and technical leadership, guiding a team of Embedded engineers while ensuring high-quality, scalable, and reliable software across current and future products. you will act as the technical authority for Embedded software, working closely with hardware, systems, and product stakeholders to translate requirements into robust software solutions.
what will your job look like?
lead the technical direction and architecture of Embedded software platforms across middleware and application layers.
serve as the technical authority for Embedded software, combining hands-on C / C ++ development with system -level ownership.
design scalable, modular software architectures and define clear interfaces between hardware, os services, middleware, and application software.
drive key technical decisions, architectural trade-offs, and long-term roadmap.
develop and integrate middleware and application-layer components, including multi-threaded and Real-Time logic.
lead design reviews, mentor Embedded software engineers, and promote high coding and architectural standards.
take ownership of complex system -level debugging, performance optimization, and software quality.
work closely with os, systems, product, QA, and manufacturing teams to translate product requirements into robust technical solutions.

which department will you join?
epg is a fast-paced, dynamic, and startup-like group responsible for researching, incubating and developing next-generation technologies and ideas, with a strong orientation towards computer vision, Machine Learning, data, and ai.
the group hosts a diverse team of scientists, engineers and developers to research, realize, and bring to market innovative new products, leveraging cutting-edge technologies, skills and capabilities.
were looking for a backend expert to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out.
what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

our autonomous driving software group in haifa is looking for a Linux Kernel Developer who will be responsible for developing Embedded sw products.
this is an exciting opportunity to work with highly talented engineers and be a part of product innovation on cutting edge technologies. what will your job look like?
researching, designing, and implementing new sw drivers and operating system features, as well as, maintaining, and enhancing existing ones.
you will also be responsible for integrating the sw solutions in mobileye's Embedded automotive platforms including the necessary hw bring-up, debug and unit testing to achieve proper operation of the new sw and hw together.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a SOC physical design engineer, you will collaborate with functional design, design for testing (dft), architecture, and packaging engineers. additionally, you will solve technical problems with micro-architecture and logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.the ai and infrastructure team is redefining whats possible. we empower customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include , cloud customers, and billions of our  users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for cloud, global networking, data center operations, systems research, and much more.
responsibilities
define and drive the implementation of physical design methodologies.
take ownership of one or more physical design partitions or top level.
drive to the closure of timing and power consumption of the design.
contribute to design methodology, libraries, and code review.
define the physical design related rule sets for the functional design engineers.

about the job
our company's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. our products need to handle information at massive scale, and extend well beyond web search. we're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data Storage, security, artificial intelligence, Natural Language Processing, UI design and mobile; the list goes on and is growing every day. as a software engineer, you will work on a specific project critical to our companys needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. we need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the Full-Stack as we continue to push technology forward.
in our company search, we're reimagining what it means to search for information - any way and anywhere. to do that, we need to solve complex engineering challenges and expand our infrastructure, while maintaining a universally accessible and useful experience that people around the world rely on. in joining the search team, you'll have an opportunity to make an impact on billions of people globally.
responsibilities
create new features and transition them into stable, production-ready systems for the windows our company app.
review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.
partner closely with product managers, UX designers, and others to define technical requirements and drive the product roadmap forward.

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
collaborate with architecture, design, and verification teams to develop new product bring-up, validation, characterization, and qualification strategies, manufacturing TEST solutions for new high performance computing (hpc) products in advanced process technologies.
verify TEST solutions on pre-silicon models (simulation or emulation) and develop ate TEST modules, dc tests, binning, production flows, and characterization flows.
develop and validate TEST programs on ate platforms for new product integration (npi) in preparation for high volume manufacturing (hvm), working with ate vendors.
support product sustainability, including volume data analysis of screening and characterization data, TEST time and yield improvements, TEST escapees and return merchandise authorizations (rmas) assessments, failure localization, containment measure implementation, and partnership with design manufacturing, quality, and reliability teams to root cause and implement corrective actions.
develop tools, flows, and methodologies to continuously improve and automate the testing.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will work as part of a research and development team. you will build verification components, constrained-random testing, and system testing, and drive verification closure. you will verify digital designs, collaborate closely with design and Verification engineers on projects, and perform direct verification. you will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. you will manage the full life-cycle of verification, which can range from verification planning and TEST execution to collecting and closing coverage.the ai and infrastructure team is redefining whats possible. we empower our customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include, cloud customers, and billions of our users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for cloud, global networking, data center operations, systems research, and much more.
responsibilities
plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
create and enhance constrained-random verification environments using systemverilog and uvm, or formally verify designs with systemverilog assertions (sva) and industry leading formal tools.
identify and write all types of coverage measures for corner-cases.
debug tests with design engineers to deliver functionally correct design blocks.
close coverage measures to identify verification holes and to show progress towards tape-out.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will use application-specific integrated circuit (asic) design experience to be part of a team that develops complex asic system -on-chip ( SOC ) intellectual property from proof-of-concept to production. this includes creating ip level microarchitecture definitions, register-transfer level (rtl) coding and all rtl quality checks. you will also have the opportunity to contribute to design flow and methodologies, including design generation automation. you will collaborate with members of architecture, software, verification, power, timing, synthesis design for testing etc. you will develop/define design options for performance, power and area.the ml, systems, & cloud ai (msca) organization at our designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our services (search, youtube, etc.) and cloud. our end users are, cloud customers and the billions of people who use services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define the ip microarchitecture level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
perform rtl development (coding and debug in verilog, systemverilog).
conduct function/performance simulation debug and lint/cdc/fv/upf checks.
engage in synthesis, timing/power closure, and asic silicon bring-up.
contribute to verification TEST plan and coverage analysis of block and SOC -level.