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We are looking for a highly motivated Product & Test Engineer to join our team and play a key role in the bring-up, test development, and productization of advanced IC products. This position involves close collaboration with design, operations, and manufacturing partners from early design stages through mass production.
Roles and responsibilities
Collaborate with design teams to review DFX architecture and define test requirements
Develop wafer sort and final test methodologies, including test content creation and program development
Perform test program coding, pattern conversion, and pre-silicon validation via virtual test simulations
Support hardware development: load boards, sockets, thermal solutions, and probe cards
Lead post-silicon test debug and sample delivery to internal and external stakeholders
Conduct test program characterization and tuning to improve coverage, yield, and quality
Work with OSATs and support manufacturing ramp-up and production
Contribute to quality and reliability test planning and execution

We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities:
Join a team of VLSI frontend design engineers in Chain-Reactions projects.
Define, plan and implement our next chip in Chain-Reactions on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.

We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people. NVIDIA is an industry leader with groundbreaking developments in High-Performance Computing & Networking, Artificial Intelligence . We are now looking for an outstanding , creative & hardworking FW & tools verification manager to join our team.

What youll be doing:
Lead the PHY layer verification team members & activities.
Responsible for ramping full regression and continues integration capabilities for all products Pre and Post Silicon.
Form the team development methodology.
Take active part in bring-up of new products.
Debug and screen HW/FW/SW issues.
Maintenance of overall FW & tools verification plan. Develop new methodologies to improve the Dev process.
work closely with product/marketing team to define release scope and timline
Supporting Application Engineering to resolve customer issues.

We are looking for an experienced Software QA Engineer to join us.
This position will be part of the sofrware QA team while the main goal is to test the physical layer area, which enables our products to meet the industry-leading benchmarks of efficiency and quality. The ideal candidate will be responsible for developing and implementing automation solutions that will drive efficiency and productivity across our engineering efforts. Your work will directly contribute to the flawless execution of our projects and help us maintain its position as a world-class technology leader. You will also engage in creating tests for many industry-leading features and be able to learn new technologies, features, and develop automated tests.

What you'll be doing:

Reviewing arch design and requirements for new features introduced in the SoC software.

Collaborating with diverse teams to identify automation requirements and devise creative solutions.

Designing, developing, and implementing automation tests, frameworks, and tools to streamline engineering processes.

Assisting with issues reproduction and debugging to understand the root cause and reporting new bugs.

Maintaining and executing automated tests to ensure the quality and reliability of our products.

Resolving automation issues and optimizing operations for seamless functionality and minimal interruptions.

Providing technical guidance and mentoring to junior engineers to foster their growth and development.

Our Networking division is looking for an excellent System Validation Engineer! NVIDIA Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data, and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.

What you'll be doing:

Test Verification and Validation (both HW and SW).
Maintain products quality by improving test stability, coverage, design, and manufacturing process.
Execute tests in different scopes such: regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.
Troubleshooting and streamlining/optimizing our testing procedures.
Support production matters.

We are looking for an excellent Software Director for the Switch management SW Group. You will join the NVIDIA switch Management team and take our product to next level, working closely with various SW teams and verification teams and gain deep understanding of NVIDIAs products and technologies. NVIDIA is widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.

What you'll be doing:

Be responsible for the integration of SW components to switch operating system.

Define, develop and design a process for integration and customer issues.

lead customer success activities, including feature development and customer engagement.

Work with a continuous integration system, regression tools.

Be responsible for NVIDIA NVL, IB Customer engagement with R&D.

Innovate! Bring NVIDIA's networking products to shine in customer's view.

We are in the early stages of a new project and looking for a talented Senior engineer to take on a key role, leading Verification efforts of major parts of our ASIC - from scratch
Roles and responsibilities:
Take ownership of Verification for large ASIC clusters.
Plan, build, and execute the Verification environment end-to-end.
Mentor and guide juniors/students.

We are looking for a Senior networking test engineer with strong system‑level debugging skills to join our End‑to‑End Verification team. You will work on cutting‑edge Ethernet‑based AI clusters, owning complex issues across hardware, system software and AI workloads. We are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

What youll be doing:

Design and review test and product requirements across the Ethernet / NIC / DPU / Switch portfolio, focusing on large‑scale AI cluster behavior.

Build and maintain realistic customer‑like testbeds, including heterogeneous hardware, OS / driver combinations and complex network fabrics.

Own end‑to‑end cluster troubleshooting: reproduce customer scenarios, triage across the stack and drive issues to root cause and fix.

Read and understand relevant source code to identify defects, validate fixes and improve logging and instrumentation.

Collaborate closely with development teams to debug NCCL, RoCE/RDMA and related networking components using logs, code inspection and targeted experiments.

Define tests and guide the automation team to implement robust suites that produce actionable logs, metrics and traces.

Run Regression, Performance, Functional and Scale testing, analyze results and provide clear, data‑driven reports to stakeholders.

Profile and benchmark deep learning training and inference workloads, correlating model‑level metrics with system and network telemetry to uncover bottlenecks.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up - FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.

Join a dynamic and innovative team driving the development of state-of-the-art EDA/CAD tools and scalable design automation infrastructure to empower advanced integrated circuit (IC) design. You will design, develop, and maintain next-generation design robust software tools and workflows across all domains in integrated circuit design, while ensuring compatibility with legacy software solutions.
Roles and responsibilities
Build, maintain, and optimize CAD tools supporting both commercial and in-house layout and verification tools (Cadence Virtuoso, Synopsys ICC, Mentor Calibre, etc.).
Develop and automate design flows spanning frontend RTL-to-GDSII, digital backend implementation, and physical/verification signoff, ensuring scalability and tapeout readiness.
Collaborate with layout, circuit, and verification teams to capture requirements and deploy efficient automation workflows.
Apply advanced software engineering and CAD methodologies to address technical challenges, evaluate architectural and hardware constraints, and deliver scalable automation solutions.
Design and implement testing frameworks, regression suites, code review practices, and CI/CD pipelines to validate CAD flows, ensure correctness, and improve reliability.
Define, document, and enforce best practices, standards, and procedures; provide technical guidance, training, and support to engineering teams.

Our DOCA Verification team is seeking a highly motivated and hardworking Software Engineer with hands-on capability technical experience, to verify the design and implementation of the next generation Data Processing Unit Software, with wide range of features related to cyber security and embedded systems. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. We're united in our quest to transform the way Smart Adapters are used.

What you'll be doing:

Collaboration & Communication: Work closely with software, architecture, product and DevOps teams to define test requirements, coordinate releases, and ensure high-quality product delivery.

End-to-End Feature Ownership: Deep dive into feature sets, taking responsibility from test plan development to final implementation and full automation.

Develop and Automate Testing: Design, implement, and maintain automated test scripts and frameworks (primarily in Python) to verify the correct functionality of our software products

System & Integration Validation: Validate software functionality and performance through system-level and integration testing, utilizing Linux-based environments and virtualization tools.

Defect Analysis: Analyze test results, open bugs and track issues to closure, ensuring robust and scalable solutions.

Continuous Improvement: Drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.

Test Environment Management: Set up, maintain, and optimize test environments using Linux, Docker, virtual machines, and other modern tools.

Regression Monitoring: Operate, monitor, and analyze failures in the nightly regression system, providing methodical root-cause analysis across hardware, OS, and software layers.

We are looking for an AI Test Architect joining E2E Verification group to profile Innovative large scale Distributed training on our AI End-to-End solutions in a large scale supercomputing clusters. Provide insights on at-scale system design and tuning mechanisms for large-scale compute runs. You will work with the latest Accelerated Computing and Deep Learning software and hardware platforms, with researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions. You will interact with HPC, OS, Switch, HCA, CPU and GPU compute, and systems specialist to architect, develop and bring up large scale performance platforms.

What youll be doing:

Profiling, benchmarking, and analyzing deep learning models to identify areas for optimization and improvement in terms of performance, efficiency, and accuracy, with a strong emphasis on networking aspects.

Collaborating closely with data scientists, researchers, development, automation teams to design and implement scalable training pipelines and frameworks that demonstrate large scale high -performance networking capabilities.

Staying up-to-date with the latest advancements in deep learning algorithms, architectures, our GPU technologies, and high-performance networking solutions.

Optimizing deep learning models for performance, memory usage, and power efficiency while maximizing high-performance networking features on our supercomputers.

Providing insights and recommendations based on the analysis of large-scale training results, specifically focusing on networking bottlenecks and optimizations, to improve model outcomes and achieve business objectives.

Collaborating with hardware engineers to guide the development and integration of efficient networking solutions for deep learning, including exploring network architecture optimizations and bringing to bear technologies such as RDMA or InfiniBand.