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we are looking for a senior mechanical engineer to join our mechanical engineering department as a key player in the development of next generation network products. this key position includes leading the product and fixtures design, close interaction with hw, pmc (product management & configuration), npi, thermal, layout, quality and supply chain groups.
nvidia networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of sectors including high performance computing, enterprise, data centers, cloud computing and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. our product line is focused on delivering the most optimized ethernet solutions for industries like media and entertainment as well as any other industry that can benefit from our datastream and tcp/ip acceleration.
what you will be doing:
drive multiple early design concepts while working in fast-paced product development cycles.
independently lead product design from concept, through detailed design, and support it during qualification, npi and mp stages.
join and lead task forces to investigate and support production excursions, failure analysis and reliability issues.
collaborate in research of groundbreaking technologies, materials, and processes with other groups to bring in creative ideas that solve ever growing needs.

looking for an excellent senior system Validation engineer!
networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.
what you'll be doing:
TEST verification and validation (both hw and sw).
maintain products quality by improving TEST stability, coverage, design, and manufacturing process in mass production.
execute tests in different scopes such: as regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.
troubleshooting and streamlining/optimizing our testing procedures.
support mass production matters.
debugging production bugs and solving them.

our networking product engineering team is looking for an excellent TEST development engineer. the position requires an understanding of both hw and sw to provide stable, efficient, and smoothly running production tests that enable high availability while ensuring the quality of the products being shipped to customers.
what youll be doing:
design and develop automated tests for networking switches and dpu adapters while working closely with the hw, asic, and sw engineering teams to achieve reliable tests with high coverage.
be exposed to various aspects of design, dft, and TEST of nvidia's next-generation network products.
take a significant part in the definition and development of tests, from early development level to the final TEST of network-systems in mass production.
work with overseas manufacturing mass production teams to increase yields, TEST coverage and capacity, and to reduce production costs.
lead TEST solution innovations to reduce TEST time and improve overall product quality.
utilize TEST suites to find, debug, and resolve problems in the production process, and drive issues to closure.
support and fix bugs in existing TEST code; support production lines for deployments, patches, and ongoing maintenance.

new equipment definition, installation, acceptance, and maintenance (multi-disciplinary -electrical, siph, mechanical, and software).
improve existing equipment up time.
collaborating with equipment vendors & with nvidia engineering and operation teams.
define and implement maintenance and monitoring processes.

testing electro-optical and electrical chips and systems.
link-level performance characterization, verification, and debugging.
responsibility for complicated setups establishments, covering both optical and electrical components
characterizing optical and electrical performance using lab equipment and sw tools.
take an active part in silicon bring-up while managing e2e testing of the newest asics, with the objective of driving product to mass production with first-in-class performance.
characterizing products performance using lab equipment, such as oscilloscope, spectrum/network analyzer, pattern-generator, etc.
working in front of various TEST teams, with the responsibility of addressing issues and monitoring the TEST flows conducted by them

we are looking for a hardworking and engaged senior QA SW engineer with experience in networking to join the system ethernet QA team! our QA team is responsible to TEST and qualify the nvidia ethernet switches solutions. we learn new features, design, execute, write automation based on Python!  widely considered to be one of the technology worlds most desirable employers. we have some of the most forward-thinking and hardworking people in the world working for us. if you're creative and autonomous, we want to hear from you!
what you'll be doing:
review the arch design and requirements for new features introduced in the product.
design, develop, and execute tests for the new features, as part of sw ga releases and update releases.
report bugs found during execution, assist with reproduction and debugs in order to understand root cause verify bug fixes provided by the r&d team, raise if not fixed.
execute system tests in different scopes: regression, performance, functional, security for ethernet protocols.
write automation tests and framework apis based on the Python language.

the manager will be leading various type of reliability testings of nvidia ics, and responsible on nvidia reliability labs, which is a multi-millions $ worth of equipment as well as activities such as iqc, oqc, ic inventory managing and shipments.
this will include ate (automated TEST equipment), systems & evaluation boards and reliability equipment.
full management a team of technicians and operators, including day to day management, prioritization, focal reviews, and training.
maintaining and operating laboratory equipment such as ic ate, htol systems, scopes, dvms and other tooling, minimizing down time for all.
providing excellent support to engineers and our internal customers, carrying out q&r tasks and following strict execution methodologies.
establishing/maintaining a comprehensive engineering lab stock, apply skills to automate complex tasks and improve team productivity and efficiency.
entering and maintaining a database of work procedures and TEST data and reading schematics of electronic circuits.
building, updating, and improving lab processes and procedures while following and ensuring strict safety procedures and safety checks.

We are looking for a skilled and motivated experienced rt systems integration & release manager to lead an systems integration team and own the end-to-end integration and release process for Real-Time Embedded products. this role is responsible for defining integration workflows, managing team execution, and ensuring that system releases are stable, predictable, and aligned with quality and delivery commitments.
the ideal candidate combines deep Embedded systems expertise, strong people leadership, and disciplined release and process management. what will your job look like:
directly manage and mentor a team of  rt systems integration and release engineers.
define, implement, and continuously improve the rt system integration and release management processes.
establish standard workflows, best practices, documentation, and quality gates.
ensure consistent execution of integration activities across projects.
drive alignment to integration processes across firmware, software, hardware, QA, and system validation teams.
identify integration risks early and implement mitigation strategies.
lead system -level integration of  Real-Time hardware and software.
manage system debugging, and root-cause analysis of complex integration issues.
oversee validation, verification, and system -level testing activities.
communicate progress, risks, and mitigation strategies to stakeholders and leadership.

join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF system -on-chip ( SOC ) products.
youll collaborate with internal teams and external osats to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
what will your job look like:
define and specify advanced package architectures for digital socs and RF ics in automotive applications.
perform substrate design for flip-chip bga (fc-bga) packages, including stack-up, routing, and ball-out optimizations.
evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
collaborate with osats to define and validate assembly materials and process flows.
work closely with internal teams such as backend, sipi, product engineering, and quality & reliability to ensure seamless integration.
monitor yield, quality, and manufacturability across package development and production stages.
support dfm reviews and ensure compliance with automotive standards and customer requirements.

join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF system -on-chip ( SOC ) products.
youll collaborate with internal teams and external osats to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
what will your job look like:
define and specify advanced package architectures for digital socs and RF ics in automotive applications.
perform substrate design for flip-chip bga (fc-bga) packages, including stack-up, routing, and ball-out optimizations.
evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
collaborate with osats to define and validate assembly materials and process flows.
work closely with internal teams such as backend, sipi, product engineering, and quality & reliability to ensure seamless integration.
monitor yield, quality, and manufacturability across package development and production stages.
support dfm reviews and ensure compliance with automotive standards and customer requirements.

we are the production TEST team - responsible for the definition, development, and deployment of production TEST operations for the worlds most advanced socs for adas and self-driving vehicles.
this is your opportunity to join a team during its initial forming stage and leave your mark as our company assumes full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products. what will your job look like?
work closely with the design teams from early stages of the design process to review dfx architecture and define TEST requirements.
define TEST methodologies and generate TEST content for high-speed interfaces of Embedded ip blocks (lpddr4/5, pcie gen4/5, d/ C /mphy).
TEST program coding, pattern conversion and pre-si validation (virtual TEST simulations)
support load board and probe card design activities.
lead post-si TEST program debug activities to enable delivery of samples to internal and external customers.
TEST program characterization and tuning to enhance TEST program quality to meet automotive standards.
support quality & reliability team to enable effective and timely qual plan execution.
lead TEST deployment activities with tier-one foundry and osat vendors to enable large-scale wafer-sort and final- TEST operations.

as a senior integration & application Developer, you will be an integral part of the esc and integration team, responsible for designing, developing, implementing, and supporting enterprise-grade application integrations, while serving as a key technical authority within the team.
we are seeking a hands-on technical lead to lead the design and delivery of integrations using the iconduct platform as the primary integration solution. the role includes continuous development and enhancement of integrations across multiple application systems, driving technical excellence, best practices, and contributing to the teams overall execution and growth, without direct people management responsibilities.
what your job will look like?
serve as a hands-on application integration technical lead, designing, developing, and maintaining integrations, scripts, and automation across our growing ecosystem.
design and build a scalable integration architecture for enterprise information systems, and lead its end-to-end implementation.
collaborate closely with cross-functional teams to gather requirements and deliver integration solutions that improve daily workflows and operational efficiency.
actively participate in technical discussions and design reviews, defining best practices for building robust, secure, and maintainable integrations.
ensure the stability, integrity, and smooth operation of the companys integration architecture.
leverage ai-based tools and technologies to enhance automation, optimize integration processes, and improve overall system efficiency.
serve as a key technical authority within the team, providing guidance, mentorship, and technical leadership.

as a quality and reliability (q&r) engineer, you will lead the qualification and long-term reliability of advanced system -on-chip ( SOC ) and RF semiconductor products for automotive applications. youll work across digital and RF domains to ensure robust performance and compliance with industry standards. what will your job look like:
define and manage quality and reliability specifications, simulations, and qualification plans for SOC and RF die and package.
plan and execute automotive-grade qualifications per standards such as aec-q100, jedec jesd22, and iatf 16949.
design and implement die-level and package-level stress tests.
select and prepare electrical, environmental, and mechanical TEST platforms for reliability testing.
define requirements for pre-si q&r (e.g. esd, lu, em, ir drop), design-for- TEST (dft), electrical characterization, and post-si q&r testing of digital, mixed-signal and RF socs.
collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (osats).
lead failure analysis, reliability modeling, and corrective action processes (e.g., 8d, fmea, fmeda).
document and certify automotive standards compliance, including ppap/apqp deliverables.

as a quality and reliability (q&r) engineer, you will lead the qualification and long-term reliability of advanced system -on-chip ( SOC ) and RF semiconductor products for automotive applications. youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
what will your job look like:
define and manage quality and reliability specifications, simulations, and qualification plans for SOC and RF die and package.
plan and execute automotive-grade qualifications per standards such as aec-q100, jedec jesd22, and iatf 16949.
design and implement die-level and package-level stress tests.
select and prepare electrical, environmental, and mechanical TEST platforms for reliability testing.
define requirements for pre-si q&r (e.g. esd, lu, em, ir drop), design-for- TEST (dft), electrical characterization, and post-si q&r testing of digital, mixed-signal and RF socs.
collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (osats).
lead failure analysis, reliability modeling, and corrective action processes (e.g., 8d, fmea, fmeda).
document and certify automotive standards compliance, including ppap/apqp deliverables.

our eyeq platform group (epg) is seeking a motivated formal Verification engineer to join our team and contribute to development of hardware verification environments.
this position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
this is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle. what will your job look like:
be the owner of formal verification environment from first draft to sign-off stage
apply formal methods to verify the correctness of various complex digital systems
work with hw architects/designers to define assumptions, rules and cover properties
help define the formal verification methodology and environment to be applied by the team
explore new formal methods and tools
work with tools like cadence jaspergold, verisium manager, xcelium, indago
analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
develop generic formal blocks/functions of commonly used logic, to be later used off the shelf