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looking for an hpc and ai data center engineer to join the networking cloud solutions hpc/ai infrastructure team. we are focused on building supercomputers and hpc clusters based on groundbreaking technologies. we are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and gpu computing. take part of building large-scale compute and deep learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.
what you will be doing:
plan and build complex cluster and supercomputers in various of data center and labs
rack stack and cable management to ensure efficient use of space and easy maintenance
ensure data centers and labs power and cooling efficiency while optimizing rack space utilization
data centers and labs daily operation and support
installations for variety of infrastructure and solutions - cloud, vms, Storage, network, hpc and ai
perform troubleshooting - network, optic cabling, bare metal, operating system.
support research & development activities

join our growing software architecture research team. the ideal candidate will be conducting cutting-edge research at the intersection of networking, security, and communications, and working alongside top experts in these fields. with incredible resources in networking, you will be able to impact, contribute and advance these domains for scalable accelerated computing. topics include but are not limited to remote direct memory access, hardware offloading and hardware acceleration, distributed accelerator networks, ai for networking and security, Storage management, cryptography accelerators and architecture. with its unique open culture, nvidia is one of the best industry labs to do accelerated computing research.
 
what youll be doing:
develop novel hw architecture models
simulations ranging from specific components to complete data center environments
develop sdks for novel hw capabilities
designing and implementing services, runtime systems, and applications over sdk
evaluate and optimize application performance
partner and collaborate with other forward-thinking team members and external researchers
participate and speak at conferences and events
work with intelligent networking machines powered by ai systems that can learn, reason and interact with other network components

as a senior architect in the advanced development team, you will explore technological challenges on accelerate networking and building ai data centers. research new transport functions and semantics for optimizing ai workloads. you will also be leading architectural and development efforts across numerous technological fields, related to the modern data center, such as distributed ai and deep learning solutions, data analytics, high performance computing (hpc), software defined networking (sdn), virtualization, Storage, and more.
what youll be doing:
enhance gpu networking offerings for accelerating ai workloads, such as dynamo or nvidia nixl.
identify and evaluate new technologies, innovations and partner relationships for alignment with our technology roadmap and business value.
lead architecture and design of such technologies.
lead proof-of-concept development to evaluate and drive such technologies.

we are looking for an expert data engineer to build and evolve the data backbone for our r&d telemetry and performance analytics ecosystem. responsibilities include processing raw, large quantities of data from live systems at the cluster level: hardware, communication units, software, and efficiency indicators. youll be part of a fast paced r&d organization, where system behavior, schemas, and requirements evolve constantly. your mission is to develop flexible, reliable, and scalable data handling pipelines that can adapt to rapid change and deliver clean, trusted data for engineers and researchers.
what youll be doing:
build flexible data ingestion and transformation frameworks that can easily handle evolving schemas and changing data contracts
develop and maintain ETL /elt workflows for refining, enriching, and classifying raw data into analytics-ready form
collaborate with r&d, hardware, DevOps, ml engineers, data scientists and performance analysts to ensure accurate data collection from Embedded systems, firmware, and performance tools
automate schema detection, versioning, and validation to ensure smooth evolution of data structures over time
maintain data quality and reliability standards, including tagging, metadata management, and lineage tracking
enable self-service analytics by providing curated datasets, apis, and databricks notebooks

our company is hiring a senior, hands-on engineer to lead technical innovation in our design verification (dv) automation infrastructure. this role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. you will directly influence how verification is performed across our next-generation networking chips, enabling more scalable, efficient, and robust flows for complex asics powering the ai revolution. 
what you'll be doing:
lead the development of advanced verification automation tools, regression flows, and debug infrastructure.
identify key challenges and inefficiencies in current dv methodologies and proactively propose and implement improvements.
work closely with dv engineers, design teams, and tool developers to ensure solutions are practical and impactful.
balance innovation with hands-on engagement in daily dv issues - keeping a strong connection to real-world challenges and support needs.
act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for dv automation.

our company is looking for a sw architecture director- a forward-thinking manager to lead the development of ai data centers and networking technologies. in this role, you will be part of a groundbreaking team driving technological innovation! this is an outstanding opportunity to craft the future of ai networking by using innovative technologies to address sophisticated challenges.
what you'll be doing:
identify and evaluate new technologies, innovations, and partner relationships for alignment with our technology roadmap and business value.
lead the development of new networking applications using data plane programming to solve sophisticated networking problems in innovative ways.
engage with customers, publish white papers, write blogs, and present at conferences to share our vision and achievements.
define a strategic vision for our networking in collaboration with adjacent software and hardware architects.

our team in israel is looking for a dedicated chiplet sta owner to join us in defining the next era of ai's networking. this is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. if you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
what you'll be doing:
perform advanced static timing analysis (sta) at chiplet and fc level.
running prime time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
identify convergence risks and work closely with physical design, rtl and dft teams, ensuring convergence throughout various project stages.
responsible for a full timing closer and quality approval from pre-layout sta model through signoff.

we are looking for a power u-arch senior engineer. our company is known as a world leader in providing energy-efficient high-performance products and we continue to invest in the research and development of hyper-efficient SOC architectures. we are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional perf/watt solutions in a wide range of sectors and verticals. come join our applied power team to develop state of the art dpu products.
what you'll be doing:
lead a micro-architecture of power features such as: power management, logical power features, etc
work with dpu arch team on power features definition.
understand the workload characteristics for dpu workloads at system scale to drive new hw/sw features.

we are looking for an experienced dft engineer to join an exceptional team of dft experts to develop the next generation dft technologies.
as a dft engineer at the networking group at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.