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We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.
You will work on developing new formal verification methodologies and tactics.

We are looking for a Hardware failure analysis engineer to join the Interconnect FA team. This position will be part of the product engineering team which control our Interconnect production lines. The ideal candidate will roll out failure analysis of products, while reviewing both the design and hardware assembly while executing manual and automated tests.

What you'll be doing:

Review architectural design (electrical, mechanical, process, software) of the tested units to locate potential design issues.

Design, develop and execute test suits to find the root cause for the HW malfunction of customers returned or production material.

Connect with inner / external customers for background review.

Finalize the investigation to summary reports.

We are looking for a Test Development Engineer to join our team. This role will work as part of a team driven by the development of our networking and interconnect products. Do you have a passion for automation development, test program development, code writing and looking for sophisticated and significant topics? We will be happy to have your skills on the team. You will handle various projects across teams, build test plans, automate test specification and execution. You will continuously innovate and develop scalable, reliable, high-performance systems and tools to enable the next generation of Interconnect products.

What Youll Be Doing:

Will work on projects across multiple functional teams from different geographies throughout the product lifecycle.

Develop test plans, execute testing via automation and/or manually for all supported hardware releases.

Work with cross-functional teams across engineering, thermal, mechanical and HW to identify test requirements.

Develop automation and tools for our hardware releases and test environment.

Debug of HW & SW failures in interconnect product, Isolate the problem and get to the root cause.

Design and build technical processes to address business issues.

Deploy the test solution to the production sites and provide support if needed.

Train personnel on the required processes and operations of complex test systems.

We are looking for best-in-class Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Act as Partition/Unit level physical design technical leader and focal point.

We are searching for PCB layout manager to expand Networking HW Group. As a PCB Layout manager at NVIDIA, you will design and development of complex printed circuit boards (PCBs) for networking hardware products. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines that empower most advanced data canters in the world. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll be doing:

Lead and manage a team of PCB layout engineers within the Networking HW Group.

Collaborate with cross-functional teams including hardware design, validation, and manufacturing to ensure successful project delivery.

Define and implement best practices for PCB layout design, ensuring high-speed signal integrity and manufacturability.

Provide technical guidance and mentorship to team members, fostering their professional growth and development.

Coordinate with external vendors and PCB fabrication partners to support project requirements.

Participate in strategic planning and roadmap discussions to support the long-term goals of the Networking HW Group.

Coordinate resources and collaborate with other PCB layout teams at Nvidia worldwide to leverage expertise and ensure alignment on projects.

We are looking for best-in-class Physical Design Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Leading and mentoring Physical Design-Backend team.

Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

In this hybrid role based in LOCATION, you will work with a global team on both the physical design of complex chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining, enhancing, and supporting Marvell's Place and Route Flow, leveraging industry-standard EDA tools. Your tasks will include performing synthesis, place and route, as well as timing analysis and closure on multiple intermediate and complex logic blocks. You will play a crucial role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Additionally, your involvement with the global timing team will include debugging and resolving any block-level timing issues encountered at the partition level. This position provides an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment at Marvell.

Required Optical Designer
About The Position
The optical designer designs new LiDAR architectures, investigates new concepts, supports the detailed design of LiDARs, and designs other optical setups for R&D and Production required across the company.
Responsibilities:
Creating optical design for complex optoelectronic systems
Design for manufacture and design for cost
Working with optical system engineers and mechanical engineers
Assistance in the production process, assembly, and measurement
Exploring new applications, technologies, and work methodologies (for example, methods for tolerance analysis, stray light analysis, etc).

We are seeking a dynamic and skilled Process Engineer (PE) to play a pivotal role in developing and supporting our unique assembly processes, particularly in Active Alignment (AA) and optics assembly. This is an exceptional opportunity to work on cutting-edge technology and contribute significantly to the industrialization of our innovative products.
As an Optics Assembly Process Engineer, you will lead the design, optimization, and monitoring of manufacturing processes for both existing and new products, ensuring optimal performance on our production line. Your responsibilities will extend beyond in-house activities, including collaboration with our vendors, making your role essential to our operations.
Responsibilities:
Active Alignment Machine Process Development: Lead the development and implementation of complex optical systems including lens assembly, dispensers, motion, and vision systems.
Technology Transfer: Facilitate the transition of manufacturing processes from R&D to production environments.
Production Process Development: Oversee process development from the design phase (DFM/DFA) to full-scale production (HVM).
Machine Optimization: Manage and optimize machinery to improve capacity and quality.
Cross-functional collaboration: Work with cross-functional teams to identify and resolve customer and field-related issues.
Software Integration: Lead activities related to machine software development, integration, maintenance, and improvements.

Our company is a multidisciplinary startup headquartered in Ra'anana.
We utilize the latest Artificial Intelligence and Electro Optics technologies and develop lifesaving, vision systems for the global railway market.
We are looking for Algorithms Group Manager with a proven managerial experience and vast knowledge in the areas of Deep learning and Computer Vision.
As an Algorithm Group Manager you will:
Lead, coach and serve as the company authority for all algo related tasks.
Build the Algo group roadmap based on outbound and inbound requirements.
Execute and deliver Algo commitments on time.
Inspire and motivate the teams for best results.
Resolve issues creatively, using the available resources.

Lab manager position for SAMPL lab at the Weizmann institute of science

The Signal Acquisition, Modeling, Processing, and Learning (SAMPL) Lab at the Weizmann Institute of Science (WIS) is looking for a talented, experienced lab manager to work on leading technology research projects in the fields of signal processing, communications, radar, data acquisition, and medical imaging.


About the role:

Managing and providing technological and scientific support to pioneering research.

Overseeing and coordinating lab demos.

Recruiting and managing the lab team.

Establishment and management of the lab's "external relations" with relevant industries and labs.

Managing conference exhibitions.

Oversight of the lab's day-to-day operations.

Implementation and management of work routines.

Knowledge management and preservation within the lab.

Assistance with grant writing and manuscripts.