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We are looking for a hands-on developer to join an innovative and talented R&D team. To join us, you will need to deliver high-quality code using the latest cloud frameworks and technologies.
As a Back-End Engineer at our company you will
Be responsible for all development aspects, from design to production, of a cloud-native product
Write high-quality, testable, and efficient code in Java / Go
Initiate and promote new ideas for the continuous improvement of product functionality
Work closely with team members and product colleagues
Lead feature development end-to-end (E2E), from initial architectural design to successful production deployment.
Write high-quality, clean, efficient, and maintainable code while adhering to best practices and coding standards
Stay up-to-date with industry trends and emerging technologies related to DevOps and the software development lifecycle
Contribute to architectural discussions and design sessions to promote scalability and maintainability.

This is a unique opportunity to operate with the agility of a startup while leveraging the backing of our companys established resources. We build on our companys industry-leading technology while owning and extending our own stack, enabling a fast pace of execution and the rapid introduction of new innovations into the product. We are designing a highly scalable, multi-tenant SaaS solution that integrates deeply within the broader developer ecosystem to deliver a seamless, plug-and-play experience.
As a Senior Software Engineer at our company you will
Architect and build scalable, multi-tenant microservices that serve as the backbone of our SaaS platform.
Design and implement agentic workflows using LLMs, MCP, and AI agents.
Leverage advanced AI coding agents to accelerate development, writing context-aware, best-practice code across diverse technical domains.
Develop integrations bridging our companys platform with the external ecosystem, including GitHub, Kubernetes, and other development tools.
Drive key infrastructure and architectural decisions to ensure our system is performant, secure, and self-sustaining.
Collaborate with other company teams to leverage the company's core infrastructure and shared services effectively.

We are seeking an experienced Software Team Leader to lead the design, implementation, and optimization of our graph compiler key backend functionalities. You will own and drive the development of compiler infrastructure that transforms high-level computational graphs into efficient, hardware-optimized execution flows. This role combines deep technical leadership with people management responsibilities.
Responsibilities:
Take full ownership of key components within the graph compiler backend. Lead, mentor, and grow a team of talented software engineers; set priorities, review designs, and ensure timely, high-quality delivery. Drive the definition and the implementation of backend compiler architecture to support various graph IR transformations, optimization passes, and hardware abstractions. Lead the identification and implementation of compiler-level optimizations to maximize performance and efficiency of workloads on target hardware. Drive clear and transparent work planning by balancing performance goals and time-to-market considerations, fostering a proactive can-do mindset across the team. Establish best practices for code quality, testing, documentation, and continuous integration within the compiler team. Work closely with frontend compiler, runtime, architecture and hardware design teams to ensure seamless integration across the software stack.

Lead the development of Sensing SDK, a core software toolkit that integrates a broad set of computer vision, audio, and voice libraries, along with AI operators. The SDK is specifically designed and optimized for latest NPUs and DSPs - NeuPro-M, NeuPro-Nano and SensPro2 - positioning it as a cornerstone of sensing and AI platform.
Key Responsibilities:
Lead and mentor a team of software engineers developing Sensing AI SDK. Architect and implement high-performance sensing SW components for AI, vision, Audio and voice optimized for vectorize SIMD execution. Collaborate with compiler and DevOps teams to ensure efficient development and deployment. Drive technical excellence through code reviews, design discussions, and continuous improvement. Own the SDK roadmap, planning, and delivery cycles. Engage with customers to enable successful pre-sale processes, support integration and gather feedback.

we are looking for a Graduate Software Simulator Developer.
In this role, you will learn and deeply understand the AI fundamentals and create tools that simulate AI neural network processor implementation. In addition, you will perform in-depth analysis and optimization to the simulator, to ensure simulator performance and accuracy for various processors architectures.
The project is using C/C++ as main development language as well as python for AI neural network
Development platforms are Linux and Windows based.
Responsibilities:
Taking part of innovative, agile, top-notch Software organization, designing Neural Network Processor (NPU) simulator in close collaboration with the architecture, algorithms, system and hardware teams.
Design and develop simulation software solutions allowing customers to run most advanced AI networks efficiently on NPU software simulation

we are looking for a Graph Compiler Software Senior Team Leader.
As a Graph Compiler Software Manager, you will lead the development of next-generation graph compiler technology. This compiler is a cornerstone of AI software offering, empowering customers to optimize, map, and execute complex neural networks across architectures with extraordinary efficiency. You will lead a group of talented engineers and team leaders working across domains such as compiler optimizations, graph-level transformations, operator mapping, scheduling, and code generation. We are seeking a visionary and technically strong leader with passion for excellence and impact in one of the most fascinating areas of AI and deep learning.
Key Responsibilities:
Lead the design and implementation of innovative graph compilation flows for AI workloads, from high-level optimizations to hardware-specific backends. Build and guide a strong, innovative, and results-driven compiler team that thrives on solving complex technical challenges. Collaborate with hardware architecture, VLSI, and software framework teams worldwide to ensure seamless integration and maximum performance. Lead the end-to-end delivery of graph compiler components while meeting aggressive KPIs. Establish and execute group planning processes to ensure timely and high-quality delivery. Provide technical and managerial guidance to team leaders and engineers. Define and drive compiler optimization strategies for AI and deep learning workloads.

We are looking for a hands-on leader to head a small team that builds simulation models for our next-generation AI hardware and DSP. Modeling is done in several layers, from cycle-accurate, bit-exact block level modeling, to event-driven full IP system flows.
Your groups mission is to take part in the exploration phase of a project, giving architects rapid, high-fidelity feedback so they can explore design options, and to perform algorithmic regression, detecting deadlocks, sweep parameters and features, and understand system-level impact in a quickly adapting, dynamic development environment.
Beyond pure performance modeling, youll keep a sharp eye on functional accuracy and QA, follow emerging academic and industry trends, and inject the relevant insights into the product.
You will also champion modern AI-assisted coding tools (e.g., Cursor AI, GitHub Copilot) to lift the productivity of the senior software engineers on your team and shorten iteration cycles.
Responsibilities:
Lead and mentor a team of simulation and modeling engineers; set goals, review designs, and remove roadblocks. Design and implement transactional / cycle-accurate / bit-exact / event-driven models that faithfully represent advanced AI IP blocks (Transformers, CNN accelerators, custom DMA, interconnects, power-management units, etc.). Build automated flows to sweep architectural parameters and features, collect metrics, and visualize system-level impact on performance, area, power, and bandwidth. Analyze and debug complex issues such as deadlocks, race conditions, and performance hotspots; deliver concise root-cause reports and actionable recommendations. Collaborate daily with architecture, VLSI, compiler, and firmware teams to translate new algorithms and hardware ideas into model requirements and specifications. Own accuracy and QA of the simulation stack: golden-model alignment, coverage tracking, regression health, and release sign-off. Continuously survey academic papers and industry trends, extract meaningful insights, and propose innovative modeling techniques or architectural directions. Promote the adoption of AI-powered development tools to accelerate coding, code-review, documentation, and test generation across the team.

Ready for an intellectual challenge that combines Mathematics and CS theory in the context of hardware development? Keep reading.

In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence

Not in the Formal domain? No worries, we offer thorough training to learn the theory and practice directly from our team experts.

In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence .
The position is relevant for both Herzliya/ Haifa site.

We are seeking a visionary Director of Engineering with a strong product mindset to lead the strategy, development, and scaling of our Software Supply Chain security product. As a Director of Engineering, you will lead teams building an enterprise-grade Software Composition Analysis solution, meeting the growing needs of our customers and supporting the ever-evolving development ecosystem.
As a Director of Engineering at our company, you will.
Build, lead, and mentor multiple cross-functional teams of developers to deliver a scalable and reliable product
Foster a culture of collaboration, automation, and continuous improvement within the engineering organization
Define and implement procedures and workflows, enabling rapid innovation alongside ensuring enterprise-grade quality of the delivered product
Architect and deliver an enterprise-grade solution that operates in both SaaS and self-hosted environments
Partner with engineering leaders, product teams, and business stakeholders to ensure successful product adoption by the customers.

In your role as a senior PHY Algorithms Development Engineer, as part of Apple Connectivity Group, you will be part of a world-class group that pioneers design and development of Physical Layer algorithms for wireless communication systems for Apple products. We live in a mobile and device driven world where knowledge of the physical world around us is needed. We rely on this knowledge to get around, to learn about our environment and to enable spectacular new features for custom applications. Apple is meeting those needs as robustly and as creatively as possible and is interested in people who want to help meet that commitment. The success we are targeting will be the result of very skilled people working in an environment which cultivates creativity, partnership, and thinking of old problem in new ways. If that sounds like the kind of environment that you find intriguing, then let's talk.

We are looking for a candidate who can innovate and integrate signal processing technologies for solving novel and diverse sets of problems in various wireless communication and sensing technologies:
- Develop communication signal processing algorithms for best-in-class implementation of various wireless standards.
- Conduct basic research of existing solutions in literature.
- Involvement in block level spec definition.
- Perform mathematical analyses of the given problem and its proposed solutions.
- Implement floating-point simulations to prove spec compliance of suggested solutions.
- Implement fixed-point modeling and simulation to allow performance sign-off and RTL bit-exact development.
- Write detailed design documents that will enable implementation of algorithms by other teams specializing in either RTL design or DSP firmware coding.
- Optimize and fine-tune the system for spec compliance on silicon in an RF lab environment.

This role is for an analog layout IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.

Senior Layout Leads are responsible for delivering Analog Mixed-Signal IP in an SOC flow. They collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs.
As a member of the AMS layout team you will be responsible to deliver Physical Design Verification clean layout, this includes the following:
Crafting complex layout for mixed signal, and analog circuits in deep SubMicron CMOS technologies.
Reviewing and analyzing floor-plans and complex circuits with circuit designers.
Running complete set of design verification tools available on AMS blocks.
Working with the circuit design team to plan/schedule work and negotiate any necessary layout trade-offs as needed.
Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout.
Exceeding engineering specifications and expectations by working closely with the circuit design team.
Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.

The Storage Technologies Quality Engineering team within our CoreOS organization is looking for a results-oriented leader with strong technical and interpersonal skills to lead a team of Quality Engineers with a focus on our Software Updates validation. The person in this role will work closely with Engineering, other QA, and cross-functional managers on delivering the highest quality experience for all our products!
As a member of our dynamic group, you will have the unique opportunity to be part of validating our Software Updates components. You will be responsible for ensuring features and performance are maintained at the highest standard.

You will be managing a team of Software Development Engineers in Test, focusing on white box testing for all our Platforms. You will drive the testing, data gathering, and project reporting for your team. You will coordinate testing with other teams, review test plans and related documentation, monitor progress, and provide sign-offs on all presubmission and release milestones. You will process data from multiple sources, draw meaningful conclusions, and present valuable recommendations to leadership. You will also be expected to contribute as an individual contributor!

Responsibilities:
Manage a team of Development Engineers in Test.
Develop, modify, automate complete test strategies, plans, and programs
Coordinate testing between multiple sites.
Drive quality initiatives for areas of responsibility.
Actively participate in testing the work you're doing.

we are looking for a Software Simulator Developer.
In this role, you will learn and deeply understand the AI fundamentals and create tools that simulate AI neural network processor implementation.
In addition, you will perform in-depth analysis and optimization to the simulator, to ensure simulator performance and accuracy for various processors architectures.
The project is using C/C++ OOP as main development language as well as python for AI neural network
Development platforms are Linux and Windows based.
Responsibilities:
Taking part of innovative, agile, top-notch Software organization, designing Neural Network Processor (NPU) simulator in close collaboration with the architecture, algorithms, system and hardware teams.
Design and develop simulation software solutions allowing customers to run most advanced AI networks efficiently on NPU software simulation.

We are seeking an Architect to join the Office of the CTO at our company and be part of a group of Architects who provide technical leadership and help Engineering build next-generation products to manage modern software releases.
As a Software Architect at our company you will.
Define architectural approaches and detailed technical Engineering specifications
Develop architectural POCs, research technical innovations and evaluate new technologies
Provide architectural oversight and guidance to Engineering teams, negotiate trade-offs and drive issues to closure
Work with Product Management to understand business requirements and market trends
Review code and perform acceptance testing to ensure quality and consistency with architectural vision
Help to steer the architectural and Engineering priorities of the company.

we are looking for a SW Automation and Validation Engineer.
In this role, you will design, develop, and maintain automated tests and infrastructures to ensure the highest quality and reliability of our products.
You will work with Agile methodologies and engage with multiple programming languages, mainly C++.
Key Responsibilities:
Develop and maintain automated tests and infrastructures in C++. Validate software functionality against system requirements and specifications. Collaborate globally with validation engineers and software developers to learn new features and create corresponding test plans. Validate tests results and identify bugs. Investigate, document, and track bugs, working closely with development teams to ensure timely resolution. Continuously improve test coverage and test automation infrastructure. Use innovative and state of the art technologies in test automation and quality engineering.