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נאספה מאתר אינטרנט
15/04/2024
Location: Giv'atayim
Job Type: Full Time and Hybrid work
We are seeking a talented professional services engineer with a strong technical background looking to grow their skills and career at a cutting-edge AppSec technology company.
The professional services engineer plays a key role in bridging Pre- and Post-Sales, Customer Success, Product, and R&D.
**In this position, youll be working in a hybrid model: three days remotely from home and two days at the office
Responsibilities:
Become a go-to technical expert on the Software Composition Analysis (SCA) solution.
Assist enterprise customers to plan, deploy and roll out the solution utilizing industry best practices.
Assist customer application teams onboard .
Lead technical meetings with customers.
Actively participate in pre-and post-sales technical discussions.
Document, track, and pro-active follow-up on customer issues.
Provide valuable feedback to Product and R&D teams for existing and new solution integrations.
Requirements:
At least 3 years of application development or DevOps experience.
B.S. in Computer Science or related field.
Experience with Continuous Integration & Continuous Delivery (CI/CD) tools.
Experience with Git.
Experience with Cloud and On-prem deployments.
Experience with Docker and container orchestration platforms.
Linux experience is a must.
Excellent analytic and problem-solving skills with a strong sense of customer commitment.
Able to think quickly under pressure and to communicate effectively.
Excellent spoken and written English is a must!
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
14/04/2024
Location: Ramat Gan
Job Type: Full Time
We are looking for an enthusiastic, experienced, and versatile full-stack engineer to take over multiple development responsibilities under the One group.
We are working with the most cutting-edge technologies, building a new and exciting cloud platform using mainly Golang, gRPC, Redis, PostgreSQL, Kubernetes, Docker and more.
How will you make an impact?
Designing and developing functional and/or technical capabilities within large scale products, making ongoing design decisions, and focusing on multiple product domains and technologies
Requirements:
BSc/MSc in Computer Science / Computer Engineering
At least 5 years of experience in software development as a full-stack engineer.
Designing and implementing microservices architecture.
Proficiency in modern front-end technologies, including JavaScript and FULL- is a must.
A strong, extensive background in Backend development in Golang and related technologies- is a big plus.
Concurrency
Testing
Expertise in testing frameworks such as Cypress.io and Jest.
Experience working with the Micro-Frontend architecture.
Strong knowledge of version control systems (e.g., Git) and CI/CD pipelines.
Ability to manage your time effectively, meet deadlines, and handle multiple tasks simultaneously.
Knowledge of SQL databases like MySQL, PostgreSQL, or similar and ability to design and optimize database schemas.
Experience with Redis for caching and data storage.
Understanding of message broker systems such as RabbitMQ for asynchronous communication.
Strong problem-solving skills and ability to proactively identify and resolve issues.
Excellent communication and collaboration skills to work effectively with cross-functional teams.
Self-managed and flexible to changes
Excellent English communication capabilities (verbal and writing)
Strong knowledge and experience in C# or .NET an advantage
Linux, docker, Experience with Kubernetes a significant advantage
AWS cloud computing platforms and services, including EC2, S3, Lambda, and RDS
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
10/04/2024
Location: Ramat Gan
Job Type: Full Time
We are looking for a Product Manager.
In this role, you will be working on a new and innovative AI-based offering that will change the way companies test the user experience of their products worldwide!
Responsibilities:
Own the product lifecycle from requirements gathering through production and release
Collect use cases from customers to develop a unique understanding of their needs
Become an expert of your domain and well familiar with the competitive landscape
Identify opportunities for product innovation and product enhancements
Translate product strategy into successful solutions and their detailed requirements
Study and measure feature usage across different customer segments to prioritize development efforts
Aim to create the best possible user experience
Initiate and drive effective cross-team collaboration
Requirements:
4+ years of experience as a Product Manager
BSc in Computer Science/Engineering or equivalent
Previous Software Engineering background
Successful history of delivering customer-driven products designed to create a great user experience
Demonstrated experience managing the end-to-end product lifecycle of B2B SaaS products
You understand behavioral analytics concepts with respect to UI/UX design and have collaborated with UI/UX designers and engineers on a breadth of projects
You have strong interpersonal skills, used to negotiate relationships and alignment across teams with different goals, functions, and initiatives
Preferred Qualifications:
Market knowledge of testing automation domain, SaaS, and/or AI platforms
Superior attention to detail while keeping an eye on the big picture
Technical expertise and the ability to question and challenge decisions and priorities
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
02/04/2024
Location: Tel Aviv-Yafo
Job Type: More than one
We are looking for a Technical Enablement Specialist to lead the Training and Enablement efforts within our growing Engineering group.
In this role, you will be responsible for designing and implementing programs and initiatives to ensure that our team has the skills, knowledge, and resources needed to be effective and efficient. You will be utilizing your management skills, technical skills, communication skills, and leadership to partner with stakeholders from across the organization and support these efforts.
Responsibilities:
Contribute to the technical enablement strategy by developing scalable and interactive learning programs.
Manage logistics, resource contributors and drive creation of enablement assets (presentations, lesson plans, courses, virtual training, self-learning, labs etc)
Support the implementation of the onboarding enablement plan for technical members
Identify opportunities for continuous learning and improvement. Support a consistent culture of Tech education and professional growth
Support and improve our Engineering Knowledge Management practices and platforms Improve productivity of engineers transitioning from one team to another
Collaborate with ENG leadership to build programs that will meet the current and future needs of our engineers in different roles
Evaluate programs for areas of improvement that lead to measurable outcomes (e.g. a reduction in new hire ramp up time) and implement improvement plans into training programs
Stay up-to-date on industry trends and best practices in learning solutions
Requirements:
5+ years of experience managing the entire training process - designing, implementing and enabling cross training programs and knowledge management
Knowledge of industry trends and best practices in authoring software, elearning and LMS
Excellent communication skills. Able to concisely communicate verbally and in writing
Excellent interpersonal skills and a positive mindset
Strong leadership and management skills
Collaborative and can do attitude
Bachelor's degree in a related field (e.g. computer science, education)
High proficiency in English.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are on the lookout for a dedicated and driven Software Engineer. Join our dynamic Design Automation team that focuses on the development of VLSI CAD tools and web applications. Our ideal candidate is eager to learn, driven by data, and includes strong interpersonal skills.

What youll be doing:
Improve and maintain the frontends and backends of our CAD tools.
Engaging in the entire lifecycle of tool and web application development, which includes backend, frontend, data storage design, UI/UX design, testing, deployment, and maintenance.
Collaborating with other team members and DA teams to implement innovative software solutions and practices.
Requirements:
What we need to see:
A bachelors degree in computer science/engineering, or equivalent experience.
2+ years of experience in software development.
Strong knowledge of Python and JavaScript.
Experience with database management systems, both SQL (e.g., PostgreSQL, MySQL) and NoSQL.
Experience with data visualization in Python.
Proven experience with CI/CD practices and tools.

Ways to stand out from the crowd:
Strong knowledge of React and other modern web development frameworks.
Familiarity with data analysis tools and libraries (e.g., pandas, numpy) is a plus.
Proficiency with the Linux operating system.
Hands-on experience with machine learning techniques and frameworks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Verification Engineer in our Networking business unit, you'll join a group of passionate engineers to design and Verification, implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Plan and Design Verification units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify, and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer Engineering or equivalent experience.

Completion of programming and logic design courses.

A great teammate with good communication and interpersonal skills.

Experience in RTL verification - an advantage.

Previous experience in networking - an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

2+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered.

Self-motivated, ability to work independently and drive tasks to completion.

A team player with good communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Knowledge in Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

0-5 years of experience in Physical Design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
What we need to see:

BSc. in Electrical Engineering or Computer engineering, or equivalent experience.

5+ years of practical verification experience.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Experience with Specman is a plus.

Good understanding of RTL design (Verilog).

Strong debugging, problem solving and analytical skills.

Excellent communication and social skills.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
Location: More than one
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

Strong programming skills in scripting languages.

Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.

Ways to stand out from the crowd:

Hands on DFT/ATPG knowledge & technical experience in DFT ASIC Design and in ATPG tools.

Knowledge of DFT including scan, MBIST, LBIST, on-chip scan compression, fault models, ATPG, and fault simulation.

Experience in Mentor TestKompress ATPG tool and retargeting flow.

Programming languages: TCL, PRL, Phyton & Unix shell scripts.

Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are hiring a Senior PCIe Firmware to the Chip Design PCIe Firmware team. You will be joining a team whose primary mission is to work on groundbreaking technology network adapters and build the core technology of the next generation devices in a wide range of fields - low-level C layer between HW and FWs, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

implement FW and verification features in a pre and post silicon environments in the PCIe technology.

Collaborate with other teams in the PCIe group, software, and architecture teams to define and craft legacy and new low-level firmware verification methods.

Improve the existing automated process.
Requirements:
What we need to see:

B.Sc. or equivalent experience in Electrical Engineering / Computer Science / Computer Engineering.

8+ years of experience in FW design and Verification.

OOP / computer structure / operating system.

Experience in Real-Time or embedded software development is an advantage.

Problem solver, Independent and curious.

Strong interpersonal skills and self-learning ability.

Strong multi-disciplinary capabilities and ability to work with a wide interface of people chip design, verification, FW, SW, architecture.

Ways to stand out from the crowd:

Knowledge of Hardware verification concepts and tools (C++, Python, GIT, Jenkins automation, HW familiarity and TDD oriented).

Experience partnering with software and arch teams to define and implement firmware.

Knowledge in networking, Linux and scripting languages.

Experience with in-depth problems solving.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Chip Design group is looking for best-in-class Design/ Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.

Daily work involves acquaintance with all aspects of chip development: micro-architecture, Firmware, Production, and Verification.

Engaged in developing cutting-edge technology within the latest PCIe generation.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.

3+ years of experience in Verification.

High Level of English.

Ways to stand out from the crowd:

Knowledge of PCI Express standard.

Validated experience in Verification or RTL Frontend ASIC Design (Chip Design).

Background in Specman.

Background in RTL uArch & coding.
This position is open to all candidates.
 
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7674939
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
 
נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

3+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
7674925
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תיאור
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
 
נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 2 years of relevant experience.

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modelling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus).

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
7674900
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
 
נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:

5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.

Strong programming skills in scripting languages.

BSc. in Electrical Engineering or Computer engineering.

Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.

Ways to stand out from the crowd:

Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.

Experience in Mentor TestKompress ATPG tool and retargeting flow.

Programming languages: TCL, PRL, Phyton & Unix shell scripts.

Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
7674892
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