לוח משרות דרושים מהנדס אלקטרוניקה בשרון

The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.

The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.



What You'll Do

Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.

Join the PHY system team , a pivotal part of silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

Key responsibilities include:

Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

What Youll Do:

Youll be part of the group driving next-generation network devices-within a startup-like atmosphere inside a well-established, leading corporation.

Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

You'll be joining our Silicon One Signal & power Integrity team, which is at the center of the silicon development at Cisco. Our SIPI engineers deal with all system development aspects and deliver detailed specifications to other development team. As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.

Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity

We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products.

Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

Write and review micro-architecture specifications

Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements

Contribute to full chip integration, timing methodology, and analysis

Collaborate with verification engineers to resolve bugs and achieve coverage closure

Work with the physical design team to close timing and PnR issues

Support design methodology evolution and best practices

Perform debug, root-cause analysis, and post-silicon validation in the lab

You'll be joining our Physical Design team , which is at the center of the silicon development at Cisco. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.

We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

In this role, you will be part of the Silicon One Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
* Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
* Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.

* Handle all chip validation aspects, including:
* Building validation plans.
* Deloping ASIC software test infrastructure.
* Writing tests in Python/C++ over device SDK.
* Executing tests and analyzing results.

our hw team in israel is looking for an experienced system / board designer to join the hardware switch group. the team leads the development of networking infrastructure for nvidia next-generation data centers focusing on accelerated performance while enabling optimized end to end gpu connectivity.
networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, Big Data and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. our products are focused on delivering the most optimized power - performance communication solutions for industries like ai, ml, cloud, media and entertainment as well as any other industry that can benefit from our datastream acceleration.
what you'll be doing:
lead pioneering switch system design from concept to mass production.
collaborate and integrate with all hw project disciplines: board design, mechanics, thermal, pcb layout, production, software/firmware, rtl and more.
project decision maker - technical focal point.
the position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes.

what you'll be doing:
lead pioneering switch system design from concept to mass production
collaborate and integrate with all hw project fields: board design, mechanics, thermal, pcb layout, production, software/firmware, rtl and more
project decision maker - technical focal point
the position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes
nvidia is widely considered to be one of the technology worlds most desirable employers. we have some of the most talented and forward-thinking individuals in the world working for us. if you're creative and autonomous, we want to hear from you!

We are looking for an experienced hardware-oriented technical writer to join our ranks, mainly (but not only) for documenting:

3D models of hardware
Installation or deployment procedures
Part replacement and maintenance procedures
Related software procedures
You should have a strong affinity with hardware, experience with CAD software and visual documentation, together with self-drive, a matching personality for working with SMEs and in a team, time management skills, and strong self-discipline. You will be reporting to the documentation team lead.

We are looking to hire an experienced Solutions Engineer in the field of Mobile Satellite Communications (SATCOM) antenna system growing business line to work alongside our passionate sales team for Land, Maritime and Airborne applications. You will be required to conduct meetings with our prospects and customers, draft and deliver presentations, demonstrate the features of company products, manage, and write winning proposals including detailed block diagrams and key features.
To ensure success, you should have in-depth knowledge of complex systems that includes mechanics, software, electronics and RF, and high-level communications and writing skills in English and Hebrew.
The ability to understand customer requirements, determine the best solutions and effectively communicate the value proposition of those solutions are critical skills.
This is a key position that will bare impact on the companys growth and ability to do business.

Responsibilities:
Solutions Engineer is subject matter experts (SME) with specialized technology experience in complex systems, which involves mechanics, electronics, software and RF.
The processes of preparation of all assigned proposals, from requirement analysis and Bid-No-Bid processes, through solution/offering concept, proposal integration and write-up, and up to completion of the proposal documentation, risk analysis, competition analysis, costing and presentation to the customer.
Work closely with technical specialists, product managers, subcontractors / potential 3rd party solution partners, sales, finance, R&D, operations, executive team and with other company team members.
Ensure that the proposal conforms to the requirements, instructions, evaluation criteria and the SOW.
Develop and maintain proposal generation processes and tools, as well as proposal templates.
The Solutions Engineer must be well-versed in the selling companys portfolio of products and services and keep up with new technologies entering the market.
Provides coaching and professional development to the sales team member associates to enhance their product knowledge, technical acumen, and technical sales skills.
Perform Link Budget Analysis

Review of Contract ,Customer SOW and SPEC requirements to ensure compliance of design and production.
Approve gates review at R&D
PLCM (Project Life Cycle Management) - process control, full partnership in project management during the development, testing, production, customer delivery and customer support phases throughout the product life
Identifying regulatory Gaps in new and carrent projects
Perform Internal and External Audits
QA presence in R&D process (capacity) and ability to prevent errors in design
Follow up after R&D corrective and preventive actions and Improvement Plans
Transfer products from development to NPI and serial production (QA activities)
Review and approval ECO / MCO / ATP/ATR, Waiver relate to R&D , ENG
Writing QA procedures
FRACAS Management
Quality Assurance Program Plan (QAPP) and the Quality Allocation Tasks for the program.
Customer complince - relate to NPI , Pre production , design errors
Perform Quarterly data analysis for QBR