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we are a global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
We are looking for a highly experienced Backend Developer - Design and develop the core backend software layer over the company's specialized flagship product. It is a unique opportunity to join a team of top-notch engineers and work on cutting-edge technologies in a fast-paced environment of quantum computation.
Join us in this exciting journey to redefine the future of quantum computing.

we are a global leader in hybrid control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software offer a groundbreaking approach to controlling quantum computers, scaling from individual qubits to arrays of thousands. At the heart of our company is a passionate, ambitious team committed to transforming the construction and operation of quantum computers. Our deep understanding of customer needs drives us to deliver unmatched solutions in this revolutionary field.
We are looking for a Senior Marketing Designer to elevate, define, and evolve our companys visual identity across every touchpoint. In this role, you will be the creative force behind our brand, blending hands-on design excellence with strategic visual storytelling.
You will play a crucial role in shaping how the world sees our company. You will not only design high-impact digital assets but also lead the visual experience for our global physical presence - including large-scale tradeshow booths, conferences, and exclusive events. You will work closely with senior management and the broader team to translate complex technological concepts into compelling, innovative designs that resonate with a highly technical audience.
Main Responsibilities
Brand Evolution & Strategy: Define, develop, and maintain our companys brand guidelines. Ensure visual consistency and clarity across all marketing, web, video, and physical outputs. Act as the champion of the brand identity, ensuring a cohesive and premium look and feel across all channels.
High-End Presentation Design: Design and elevate high-stakes presentations for executive leadership, investors, and conferences. Transform complex data and narratives into visually stunning, clear, and impactful slides.
Event & Experiential Design: Lead the conceptualization and design of physical assets for global tradeshows and conferences. This includes booth design, large-format signage, swag, printed collateral, and on-site branding elements that create an immersive experience.
Digital & Campaign Design: Create visually appealing high-quality UX and graphics for multi-channel marketing campaigns, including web pages, social media, email campaigns, digital ads, and brochures.
Project & Agency Management: Manage multiple design projects simultaneously from concept to delivery, ensuring timely execution and adherence to deadlines. Manage external design and creative agencies, acting as the primary point of contact to ensure their output meets our company's quality standards and brand guidelines.
Cross-Functional Collaboration: Partner closely with stakeholders across various corporate departments - including Marketing, Product, Sales, R&D, Operations, and HR - to support diverse brand and communication needs. Participate in brainstorming sessions to contribute fresh, "out-of-the-box" ideas that align with business goals.
Visual Storytelling: Translate abstract quantum computing concepts and high-level visions into concrete, understandable, and aesthetically striking design concepts.

we are looking for a Senior Asic Design.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

we are looking for a Electrical Post Silicon Validation HW Engineer.
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
* Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
* Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
* Handle all chip validation aspects, including:
* Building validation plans.
* Performing EPSV using advanced test and measurement equipment.
* Writing tests in Python over device SDK.
* Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

We are looking for an experienced STA Lead Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.
Responsibilities
Take part in STA activities for blocks, Sub Systems and Full chip, from definitions to TO
Analyze timing results, verify correctness and provide timing budget for the different partitions.
Own the timing constraints both for STA and P&R flow.
Working closely with architecture, design, PD and DFT teams to make sure timing closure and ensures product success
Identify risks and bottlenecks, work closely with PD, RTL and DFT teams, ensuring convergence throughout various project stages.
Participating in design methodology, reviews and tool automation work and definition
As part of this rule you will gain very good understanding of our HPC and AI designs and sub system as well as product targets.

We are looking for a talented and experienced engineer to participate in the physical design of the companys product for leading one of Nextsilison BE projects. This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout.
In this role, you will be at the center of the companys design efforts and will have a significant influence on product architecture.
Responsibilities
Generate and analyze critical block- and chip-level static timing constraints
Spec and define full chip floor plan, including pin placement, partitions, and power grid
Develop and validate high-performance, low-power clock network guidelines
Perform critical block-level place and route and create designs that meet timing, area, and power constraints
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations
Work with vendors on defining physical design methodologies and assist in flow development for chip integration.

we are looking for a Senior Verification Engineer.
Your Impact
Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success, powering the next generation of Internet infrastructure

We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.
Everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Responsibilities
Define and drive the design of advanced blocks from micro-architecture phase to netlist
Support timing and constraints definitions work closely with the BE team on timing and physical implementation efforts
Leading processes relating to power optimization
Technology expert, building a knowledge base for the group
Work with various teams to drive execution (SW, Architecture, verification, BE, etc)
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

Required Physical Design Team Leader
Description
We are reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.
Everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!
Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements. .
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.