לוח משרות דרושים מהנדסים בשרון

Requirements:
* B.Sc./M.Sc. in Electrical Engineering from a recognized university.
* 3+ years of experience in analog or mixed-signal design, simulation and testing techniques.
* Building blocks such as: OPAMPs, Gm-C filters, switched capacitors, ADCs, DACs, bandgaps.
* Laboratory measurement skills. It would be great advantage if you are:
* Familiar with frequency synthesis: phase detectors, oscillators, LC-VCOs & PLLs.
* Familiar with High-speed analog/mixed-signal circuit design technique.
* Familiar with layout verification tools (Calibre, PVS).
* Experienced in high-level scripting languages (e.g. Python, TCL, Perl).
* Strong knowledge of MOS, Bipolar transistors and CMOS fabrication processes
* Integrated power conversion circuits such as DC-DC, charge-pumps, rectifiers, LDO’s and power amplifiers.
* Knowledge of high voltage IC processes (e.g. BCD, SOI).

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.

Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Good understanding of CPU design methodology
Excellent verbal and written communication skills.
CPU related Experience in one of the leading CPU companies or in academia.
Willing to relocate to China for extended period.
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience modeling microprocessors using higher-level languages, like C/C++.

Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MSc or BSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 7 years of relevant research and development experience in industry and academia in the following areas:
Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
Workload characterization and analytical model generation
System Modelling and emulation of HW.
Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and global vision throughout the company
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners.
Excellent oral and written English.

Requirements:
B.Sc. in Electrical Engineering
Experience in defining architectures DSP/CPU/GPU processor cores is an advantage
Experience in HW acceleration of AI
Architecture modeling experience is an advantage
System C knowledge is an advantage
10+ years in VLSI architecture and design (less can be accepted in case of a unique candidate)
Skills
Good interpersonal skills
Very good technical skills
Team player
Creative
Independent and self-learning.

Requirements:
Bachelor's degree in Computer Science, Software Engineering, Data Engineering, Computer Engineering, Electrical Engineering, or a related technical field.
Strong interest in research, innovation management, or technology planning.
Excellent comprehension of technical content (e.g., academic articles, market research, and other data sources).
Highly skilled in producing clear, concise, and well-structured summaries and presentations.
Proven ability to prioritize and handle multiple tasks.
Nice to Have:
Experience in academic research or technical writing and collaborations with the academy and industry.

Requirements:
BSc or higher degree in Computer Science/Engineering or related discipline from a leading university. (Alternatively, exceptional proven track record in similar tasks)
3+ years of experience in one or more of following disciplines: development of simulators/emulators for CPUs, definition of CPU features, HW/SW co-design, Low level performance profiling and optimization of SW with exposure to CPU ISA
Fluent spoken and written English
Behavioral skills: Team player. Interpersonal skills needed to collaborate with colleagues towards achieving a technical goal
Advantageous qualifications:
Experience in SW/HW codesign or in definition of new instructions will be a great advantage
Familiarity with dense compute workloads and analysis (e.g., AI, HPC, financial, etc.)
Familiarity with Vector Architectures.

Requirements:
MSc/PhD in Computer Engineering / Computer Science or equivalent
5+ years of experience in software development in Linux environments
Experience designing complex distributed systems
Deep system understanding and ability toenhance and optimize existing code
Proficiency in analyzing academic papers and studying AI/cloud technological trends
Strong technical leadership, excellent interpersonal skills, and ability to work in a global team
Fast learner, highly organized, detail-oriented, and able to manage multiple deadlines in a fast-paced environment.
Skills:
Expertise in AI/ML infrastructure, memory-tiering, caching, or high-performance computing
Proficiency in C++ and Python
Experience with cloud platforms (AWS, Google Cloud, Azure)
Knowledge of AI/ML frameworks (PyTorch, TensorFlow, vLLM) and performance optimization
Nice to Have
Experience in storage/memory domains (as applied to AI workloads)
Advanced Python programming with ML/AI library implementations
Experience with LLM (Large Language Model) and multimodal AI training pipelines
Background in benchmarking, performance tuning, and optimizing Storage or AI applications.

Requirements:
* B.Sc. in Electrical Engineering
* Over 5 years of experience in circuit design and HW board design
*  Knowledge in Analog circuits and Op Amps behavior
* Proven experience working with lab equipment such as Spectrum, Scope, Electronic Loads act.
*  Knowledge of DC2DC converter topologies such as Buck, Boost, Flyback and forward
* Experience in designing Flyback DC2DC converters
*  Knowledge in Orcad, Visio and Pspice
* Feedback control loop knowledge
*  Knowledge in EMI requirements and design
* Knowledge in magnetic design
* Knowledge in power layout design
* Passionate for power electronics our company recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people.

Requirements:
* Highly motivated, self-learning, good communication skills.
* At least 5 years of experience with PCB layout.
* At least 3 years of experience with OrCad PCB designer / Cadence Allegro.
* Experienced with constraint driven layout design and Allegro Constraint Manager.
* Familiar with controlled impedance design.
* Familiar with HV Design and grounding practices.
* Familiar with digital / analog mixed signal considerations.
* Experience with DFM considerations and DFA/DFM reports and their consequences.
* Experience in tape-out procedures, manufacturing files preparation, readme files.

Requirements:
* 4+ years of experience in system testing.
* Strong understanding of software development life cycle and testing methodologies.
* Experience with TEST case management and defect tracking tools.
* Excellent verbal and written communication skills.
* Strong analytical and problem-solving skills.
* Ability to work in a fast-paced, dynamic environment with changing priorities and tight deadlines.
Preferred Qualifications:
* Experience as Sys-Admin, Support, Integration engineer or Professional Services.
* Knowledge of SAN and NAS protocols.
* Experience with setup and administration of Active Directory.
* Experience with virtualization technologies like VMware /HyperV/KVM.
* Experience with execution, debugging, and writing of scripts ( Python /Bash).
* Experience with HW testing.
*  MCSE /CCNA/ISTQB or higher certifications.
About us our company enterprise Storage portfolio provides global enterprises and service providers with best-in-class solutions for primary Storage, next-generation data protection, disaster recovery, business continuity, and cyber resilience our company's InfuzeOS on all our platforms is the only single, software-defined Storage architecture in the industry that spans all platforms. We recently showcased the future of enterprise Storage, Cyber security, and hybrid multi-cloud with our new and exciting G4 launch! Not only has our company won 24 awards in the first half of 2024, but has also been a 6-time winner of the Gartner Peer Insights Voice of the Customer Award for Primary Storage and we can go on, and on, and on

Requirements:
* SC in Industrial Engineering Management
* Experience of 2+ years as a Planner at a multidisciplinary company
* Excellent knowledge in MS-office
* Highly motivated and ability to work in a fast-paced business environment
* Experience with procurement & warehouse process
* Experience with Agile system and ERP systems, Priority / Oracle
* Experience with Sub Contractor management
* Experience of work orders, opening, scheduling for production lines.
* Fast learner, Independent and autodidact
* Knowledge of manufacturing process
* Creative, be able to provide out of the box solutions
* Capable of working under stress and set up priority of all open tasks
* Excellent fluent English-Read/Write and Speaking
* A team player
* Strong analytical capabilities