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We are now looking for a Senior Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform physical layout for full-chip level, integration, pinning and bump route.

Work with block owners and project managers to assure high quality convergence in all layout aspects.

You will be responsible for chip layout from the floorplanning stage through tape-out.

We are looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.

Drive your design through the full implementation flow - synthesis, timing closure, lint/CDC and physical design constraints - together with the backend teams.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform advanced AI Static Timing Analysis (STA) for complex chiplet and full chip level.

AI use for timing optimization and data analysis in STA and PnR.

Running and build STA tools for anlyaze and debug timing.

Use traditional STA tools like Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

We are looking for you! Joining our team, you will have the opportunity to excel and develop brand new switch products for one of the world's leading companies! We are seeking an experienced Software Engineer to join the Networking Switch SW group, developing the switch Operating System (NVOS). Key role in developing the NVOS is critical for our next-gen networking tech for HPC data centers. Are you passionate about working on innovative technologies? Then we want to hear from you!

What you'll be doing:

Owning and leading the NVOS including development, testing flow and product life cycle.

As a Senior Software Engineer, you will use your expertise in C++ and Python to develop NVOS features and support new products.

Lead NVOS integrations with FW, hardware, and production teams.

Support internal and external customers for any NVOS related items.

We are looking for a performance modeling architect to join the team and shape, optimize, and explore our future networking chips and solutions. The role is cross-disciplinary, collaborating with hardware, software, and research teams across the wider company. You will lead workgroups towards technical solutions that will influence the heart of cutting-edge networking products. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation of networking solutions.


What you'll be doing:

Thoroughly understand our networking solutions across all performance related aspects

Develop a C++ simulation model to define and evaluate architectural options for our next generation of networking products.

Understand different trade-offs related to solving performance bottlenecks.

Collaborate and lead technical solutions within architecture, research, hardware, and software teams.

Analyze and model the communication patterns of key DL, GAI, inference, and training applications.

Explore innovative ideas to improve and optimize our chip systems performance.

We are looking for a passionate and talented SW & System Architect to join our SW Architecture group. The position includes researching new technologies with focus on architecture definition of groundbreaking technologies in different domains - networking, security, virtualization and orchestration. Our Architecture group consists of world-class architects responsible for designing the next generation state-of-the-art architecture for our DPUs & NICs technologies.

You will play a key role defining the future of cloud solution stack, from HW to Application level, including orchestration, provisioning, network programmability and SDN. You will be working with various teams around the world including SW architects, R&D, product, solution architects and external customers. This position offers a unique and exceptional opportunity to have real impact in a dynamic, technology-focused company shaping the future of data-centers technologies.

What you will be doing:

Lead architecture for cloud-networking including orchestration, provisioning and security solutions.

Design state-of-the-art system architecture for DPUs & NICs technologies.

Build end-to-end solutions from application level to HW.

Responsible for writing effective, clear and reliable architecture specification.

Evaluate new technologies and innovate & rapidly develop POC prototypes that can then be developed into full-fledged products/solutions.

Work closely with different teams around the world including sw & hw architects, R&D, product, solution architects, application and field engineers and more.

Work with high profile customers on advanced and future technologies and solutions.

We are looking for an excellent Software Manager to join the Switch SDK Group and lead a team of powerful software engineers. You will join the SDK group and take our product to next level, working closely with various other design and architecture teams and gain a deep understanding of our products and technologies. We have been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people.

Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. Youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

What you'll be doing:

Leading and managing a dynamic team of engineers, ensuring smooth and efficient project execution.

Developing and implementing our Ethernet SDK with a focus on high-performance and reliability.

Collaborating with teams from other subject areas to identify technical requirements and successfully implement innovative solutions.

Following established guidelines and standards to ensure the delivery of high-quality products.

Continuously striving for excellence, improving team performance, and driving innovation.

Our Network Architecture, Modeling and Performance Insights group is seeking a skilled and driven AI Network Modeling Engineer to conduct advanced network research and optimization while utilizing and enhancing our advanced simulation tools.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network architectures, topologies, configurations, logic and traffic patterns, and analyzing their effect on end to end performance. You will develop expertise in our simulation tools and contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance. If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

What you'll be doing:

Directly impact the architecture of our next generation AI and HPC offerings through modeling, simulation and analysis.

Deep dive into network behavior for training and inference use cases under advanced network topologies, configurations and traffic patterns which represent real life AI workloads, and analyze their effect on the systems performance. Develop advanced simulation solutions while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

Our Network Architecture, Modeling and Performance Insights group is seeking a skilled and driven AI Network Modeling Architect to conduct advanced network research and optimization while utilizing and enhancing our advanced simulation tools.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network architectures, topologies, configurations, logic and traffic patterns, and analyzing their effect on end to end performance. You will develop expertise in our simulation tools and contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance. If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

 

What you'll be doing:

Directly impact the architecture of our next generation AI and HPC offerings through modeling, simulation and analysis.

Deep dive into network behavior for training and inference use cases under advanced network topologies, configurations and traffic patterns which represent real life AI workloads, and analyze their effect on the systems performance. Develop advanced simulation solutions while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

The Networking Application Engineering team is looking for a motivated, experienced Senior Hardware Engineer who thrives at the intersection of hardware performance, ecosystem validation, and ODM/OEM partnerships. In this high-impact role, you will own critical qualification tooling, drive the design-in process with leading hardware partners, and collaborate across םור R&D organization to accelerate hardware resolutions at scale. Your work will directly influence the quality and velocity of next-generation networking hardware reaching the world's most advanced data centers and supercomputers.

What You'll Be Doing:

Own and lead the Hardware Performance and Qualification tooling suite, driving continuous improvement in test coverage, automation, and accuracy in collaboration with leading ODMs and OEMs.

Drive the design-in process with top-tier ODM and OEM partners, ensuring seamless hardware integration and delivering best-in-class platform experiences.

Partner cross-functionally with multiple R&D departments to identify, escalate, and resolve hardware issues rapidly - reducing time-to-resolution and maintaining platform quality.

Define and execute qualification plans for new hardware platforms, validating performance, stability, and compliance across diverse system configurations.

Build and nurture trusted technical relationships with ODM/OEM engineering teams, acting as the go-to expert for hardware performance and qualification.

Provide actionable feedback to engineering and product teams based on qualification findings and partner interactions.

We are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

We are building a new group in Israel, this group will deliver security engines and risc-V processor IPs to all of our product lines working with all our groups around the world. We are looking for an Architect with a security experience to help lead the Arch work on security engines and secure boot flows. You will work closely with our security architects, design engineers, verification engineers, and SW engineers to accomplish your tasks.

What you will be doing:

Participate in Architecture development and document specifications.

Work with RTL and the verification team to ensure that the design meets the spec.

Help deliver a design that meets the high security standards of us and our customers.

Our Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs - from concept to tape-out - and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.


What you'll be doing:
Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.

We are looking for a program manager with technical skills for HW R&D organization, responsible for programs and project on various Network products. The PM will drive execution and scheduling of HW projects while aligning with corporate priorities and constraints.

What you'll be doing:

Responsibility to coordinate between all project stakeholders such as marketing, engineering teams, operations etc. from initial requirements definition through delivery.

Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.

Responsibility for developing and implementing HW methodologies and Project management processes and tools.