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Required Experienced RFIC/Analog CAD Engineer
The RFIC/Analog design groups in our Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization.
To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement.
We're looking for an Experienced CAD or Design Automation Engineer to develop our RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

We are seeking a skilled and detail-oriented High-Speed Board Designer to join our team. In this role you will design and develop high-speed printed circuit boards (PCBs) that power advanced electronic systems. Youll play a key role in shaping the performance, reliability, manufacturability of our hardware products.

Responsibilities
Design and develop high-speed PCBs for various applications, ensuring optimal performance and reliability
Perform schematic capture, circuit design, and layout definition
Conduct signal integrity and power integrity analysis to optimize board performance
Collaborate with cross-functional teams, including hardware, firmware, and manufacturing engineers
Define routing constraints for high-speed interfaces and ensure compliance with industry standards
Conduct board bring-up, testing, and debugging of prototypes
Work with FPGA and microcontroller development for board-level integration
Generate documentation for PCB fabrication and assembly

Were looking for a Experienced Physical Design Engineer to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.

Required Experienced Logic Design Engineer
The EyeC VLSI team specializes in designing advanced radar system chips for ADAS (Advanced Driver Assistance Systems) and autonomous vehicles. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
Design ownership on major blocks/clusters from definition to implementation phase.
Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
Design micro-architecture of custom blocks.

We develop high-performance imaging radar for autonomously driving vehicles. The project involves cutting-edge HW, VLSI, mechanics, SW and Algorithms. We are looking for an Experienced Chip Package Design Engineer to be part of our imaging radar HW team.
What will your job look like:
Technical Project lead & Co Design to support the development of IC package with the OSAT, Si, VLSI and System Architecture teams.
Manage co-design meetings with HW, RF and VLSI teams
Design IC packages (e.g., flip-chip, wafer-level, FCBGA) using industry-standard EDA tools (e.g., Cadence APD/SIP, Mentor, Ansys tools)
Manage subcontractors and vendors for development and manufacturing of chip substrate, IC package and IC testing
Simulate high-performance signal/power-integrity chip substrate, including layout, mechanical & thermal simulations
Collaborate and support peer teams from other projects.

We are looking for a Emulation Engineer to join the Radar VLSI team and drive the development of the next generation ASIC Sensors.
What will your job look like:
This role is all about making high-end Emulation environment base on new designs.
Building and integrating complex components, working with cross-functional engineering teams, and making systems that will change the way we drive.
This role requires an engineer who loves challenges and knows how to bring engineering excellence while considering complicated constraints.
You will work with members of a cross-functional talented,
You will lead the Emulation development for the VLSI team.
You will work closely with SW Engineers, Logic Engineers, Verification Engineers, and others.
You will serve as an expert matter for your domain, which has the full responsibility to drive & implement improvements and new ideas.

Required Experienced DFT Engineer
The EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer.
This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more)
Develop all the necessary RTL for the different modules
Verify and Validate your design in GLS
Develop ATPG patterns to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss
Support production activities and Si debug.

Required Experienced Physical Design Engineer
Which department will you join?
VLSI team - a group designing the EyeQ chips for ADAS and autonomous cars.
The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
Each Physical Design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges
Were looking for a Backend Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

We are seeking an experienced and highly motivated System Development Engineer who will handle and optimize the operation of our systems while utilizing the knowledge gained towards future scale up. The ideal candidate will be a team player with strong technical expertise and data analysis capabilities. This role will have an important impact on future company systems.

Key Responsibilities
Operation of multidisciplinary systems- DOEs, testing, data analysis, reports etc.
Provide faster and deeper understanding of the process and system using data analysis tools.
Design and oversee the execution of various engineering projects. Including drawings, project documentation, commissioning and validation tests.
Develop and carry out new testing methods.
Commissioning of new systems all the way towards continuous operation
Troubleshooting, and creative solutions for system related challenges

Our Automated Driving group in Haifa is looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.
At our Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
You'll be responsible of architecture of the DFT solutions across the SOC (MBIST, SCAN ATPG, LBIST and more)
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts as it required by the Automotive and Safety related products market (ISO26262).

we are looking for a Senior GenAI/NLP Algorithm Developer to join us in research and development of our next-generation automatic sports video content engine. If you are passionate about state-of-the-art NLP and Generative AI research we are looking for you!
What youll do:
The teams main focus: NLP & Generative AI.
Research and develop end-to-end real-time solutions for sports content automation using state of the art deep learning algorithms for text, speech, audio and data analysis.
Full R&D cycle, from problem definition and research to implementation and productization with a high level of autonomy.
In addition, part of the role & responsibilities will be:
Design, develop and implement state-of-the-art Generative models, prompt engineering and classical ML/NLP techniques to create high-quality solutions for demanding product-oriented NLP tasks.
Engage in collaboration with product, account, and customer success teams to establish success criteria and convert them into measurable objectives and quantitative measures.
Conduct training and evaluation of models within practical production scenarios.

We are seeking an exceptional Technical Project Manager to join our team.

Responsibilities:

* Participate in a team leading an extraordinary international space program, integrating new satellites and capabilities with state-of-the-art technologies into a unified eco- system.
* Analyze customer requirements, specifications, architectures, and operational concepts.
* Manage projects and contribute to design, development, marketing, and business development efforts.
* Collaborate closely with engineering teams to analyze and solve complex system -level challenges.
* Research new technologies and solutions for next-generation systems.