לוח משרות דרושים חשמל ואלקטרוניקה משרה מלאה

DRS RADA is a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. We are looking for ATE software engineer. As a Software Automatic TEST Equipment Engineer, you will play a vital role in developing and maintaining advanced Automatic TEST Equipment (ATE) software for electronic cards and calibration systems used in our cutting-edge Active Electronically Scanned Array (AESA) radar technology. You will collaborate closely with a multidisciplinary team to ensure the functionality, accuracy, and performance of our ATE systems Key Responsibilities:
* ATE Software Development: Design, develop, TEST, and maintain software for Automatic TEST Equipment used in electronic card testing and AESA radar calibration.
* Integration: Collaborate with hardware engineers to integrate ATE software with testing equipment and devices, ensuring seamless operation.
* Debugging and Troubleshooting: Identify and resolve software issues, system failures, and compatibility problems to ensure optimal ATE performance.
* Documentation: Maintain accurate and up-to-date documentation.
*  Quality Assurance : Implement quality control measures to ensure that ATE software meets industry standards and complies with project requirements.
* Team Collaboration: Work closely with cross-functional teams, including hardware engineers, software developers, and project managers, to meet project milestones and objectives.
* Continuous Improvement: Stay up-to-date with industry trends and emerging technologies, and contribute to the ongoing improvement of ATE software and testing methodologies..

[The Radar VLSI team is looking for an experienced Formal Verification Engineer to join us! This is a newly established team with a mission to integrate Formal Verification as a key methodology in Radar projects. Be part of a cutting-edge group designing chips for radar systems in ADAS and autonomous vehicles, where your expertise will have a significant impact.
What will your job look like:
You will verify unique and complex design blocks.
Help determine the Formal strategy and methodology for the team.
Explore new Formal methods and tools.

Were looking for a Backend Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

Our Imaging Radar group develops innovative high-performance Imaging Radar solutions for ADAS and Autonomous Driving markets.
We are seeking an experienced and independent Technical Program Manager, who will lead a multi-disciplinary cutting-edge projects. The scope of work requires deep technical understanding, detailed planning and tracking of concurrent development activities and effective collaboration with several development teams, different stakeholders and management.
What will your job look like:
Lead all development aspects together with major key customer
Plan, manage and lead the project through all development pashes
Collaborate with cross-functional development teams such as VLSI, RF, System, HW, Algorithms, SW and Validation
Lead program reviews and plans with customers
Identify possible technical or execution problems and risks and drive for solutions
Ensure that product is delivered on time, meeting KPIs and within budget
Report program development progress to senior managers.

Required Experienced SoC Verification Engineer
Which team will you join?
Mobileye EyeC VLSI team - a group designing the chips for Radar systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
You will take a central hands-on role in Design Verification.
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan .
Execute coverage implementation.
Be part of external IP verification and Internal custom IP.
Be part of System definition and top-level activity.
Take part in Silicon bring-up.

we are looking for a highly skilled and experienced DFT Lead to take a central role in shaping the DFT implementation for the companys next-generation SoC. As the DFT Lead, you will be responsible for overseeing the development and execution of testing methodologies to ensure the functionality, reliability, and manufacturability of integrated circuits (ICs) and other hardware designs. You will play a critical leadership role in integrating test structures into the design of electronic components, driving efficient testing processes throughout the product lifecycle, from production to deployment and maintenance. This is a key position that will directly influence the success of our projects and the quality of our products.
Responsibilities
Develop DFT methodologies for IC designs, such as scan chains, built-in self-test (BIST), boundary scan, MBIST
Implement and validate DFT features to ensure coverage and quality.
Perform scan insertion, MBIST insertion and ensure architectural spec is met
Generate ATPG patterns for stuck at and at speed, ensure all sequential elements are scannable to achieve high coverage. Generate MBIST patterns and ensure all memories are being covered for defects
Collaborate with design teams to create test strategies and plans that identify potential defects
Perform simulations and verification of DFT designs to confirm functionality and accuracy.
Analyze fault models and optimize for high coverage, including stuck-at, transition, and path delay faults.
Collaborate with test engineers to perform yield analysis and improve DFT methodologies.
Troubleshoot and debug design issues found during testing.
Develop techniques to isolate faults and improve test coverage with minimal impact on design.
Work with cross-functional teams (e.g., design, verification, test engineering) to integrate DFT features effectively.
Document DFT architecture, procedures, and test coverage to support production testing and ongoing improvement.

A world leader in driver assistant systems and autonomous vehicles, is looking for talented silicon validation engineer for the range of its next generation SoCs supporting its radar systems
Our team is responsible for validating our radar SoCs, utilizing Pre-Silicon environments, as well as Post-Silicon platforms.
We are developing fully embedded C++ based validation environment for our needs.
You will be taking part in developing anything from environment and drivers through system modules such as file system, network stack, memory management and more, and up to complex automation tools in both C++ and python.
What will your job look like
Get a deep understanding of our chip hardware IP blocks, both analog and digital.
Develop our validation environment.
Develop, port, or add features to the product drivers using Technical Specs and existing modules.
Define, develop and execute various complex validation scenarios on the SoC.
Debug complex SoC problems using embedded GDB, JTAG probes, going down to signal level using scopes.
Take part in Next Gen SoC's Power-On's and platforms Bring-Up's.
Collaborate with other SW/Embedded and HW/Electrical Validation teams across the company.