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Required Senior Embedded Firmware Engineer, DSP, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will develop the real-time software "brain" of next-generation high-speed interconnects. You will write high-performance C/C++ code that manages critical power-on, reset, and calibration sequences, ensuring our custom silicon reaches peak performance and stability in milliseconds.
Responsibilities
Design and implement real-time embedded C/C++ code for data path control, management, and telemetry.
Develop low-level drivers and Hardware Abstraction Layers (HAL) to interface with custom digital signal processing (DSP) hardware blocks and registers.
Implement and debug firmware-based adaptation algorithms for equalizer tap updates and gain control (VGA/TIA).
Write unit tests and participate in continuous integration flows to ensure firmware stability across hardware revisions and emulation platforms.

Required Power and Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

We are looking for an experienced, driven, and tech-savvy Senior Project Manager to lead complex, multi-disciplinary hybrid cloud initiatives within our Expert Services Group. In this role, you will be the driving force behind end-to-end cloud transformation projects-managing client relationships, coordinating elite engineering squads, keeping budgets and timelines on track, and ensuring the highest technical and operational standards.
If you thrive in a fast-paced ecosystem, have a strong technical foundation in cloud infrastructure (Cloud and on-premise environments), and excel at steering high-impact professional services projects, this is your next challenge.
Key Responsibilities
End-to-End Project Lifecycle Management: Own the delivery of complex hybrid cloud projects-from kickoff and discovery through architecture design, migration execution, and final handover.
Client & Partners Engagement and Stakeholder Management: Serve as the primary trusted advisor and point of contact for enterprise clients and partners, managing expectations, communicating progress, and mitigating risks.
Resource & Capacity Planning: Coordinate cross-functional squads of Cloud Architects, DevOps Engineers, and System Specialists, ensuring optimal allocation and utilization.
Financial & Scope Oversight: Manage project budgets, tracking billable utilization, statements of work (SOWs), change management requests, and profitability margins.
Technical Synchronization: Bridge the gap between business stakeholders and deep-tech engineering teams, facilitating technical reviews, bottleneck resolution, and architectural alignment.

Required Senior Edge-AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.