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We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

be part of a unique FC team of experts who have deep understanding in all FC aspects, especially integration and STA.

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are looking for an HPC and AI Data Center Engineer to join the networking cloud solutions HPC/AI Infrastructure team. We are focused on building supercomputers and HPC clusters based on groundbreaking technologies. We are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing. Take part of building large-scale compute and Deep Learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.

What you will be doing:

Plan and build complex cluster and supercomputers in various of data center and labs.

Rack stack and cable management to ensure efficient use of space and easy maintenance.

Ensure data centers and labs power and cooling efficiency while optimizing rack space utilization.

Data centers and labs daily operation and support.

Installations for variety of infrastructure and solutions - Cloud, VMs, Storage, Network, HPC and AI.

Perform troubleshooting - network, optic cabling, bare metal, operating system.

Support Research & Development activities.

Join our Networking Silicon team as a Senior Full-Chip ASIC Engineer. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level. You will contribute to the architecture of high-speed communication devices by building advanced simulation platforms and driving full-chip verification execution for the networking solutions powering the worlds most advanced data centers.

What youll be doing:
Full-Chip Verification & Execution: Own complex system-level features by defining verification plans and driving the end-to-end execution.
Software Simulation Development: Architect and code robust software simulation platforms that serve as the foundation for Firmware development and uArchitectural research
AI-Enhanced Engineering: Accelerate development by leveraging cutting-edge AI coding tools and frameworks.
Global Technical Collaboration: Partner with Architecture, FW, and SW engineering teams across the globe to deliver industry-leading networking solutions

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

We are seeking a highly motivated and experienced System Test Architect to define, develop, and drive comprehensive validation strategies for next-generation hardware platforms. As a key member of our hardware architecture and systems engineering team, you will be responsible for ensuring the robustness, performance, and scalability of our cutting-edge products across AI, graphics, data center, and automotive domains. You will collaborate with cross-functional teams-including silicon design, board design, firmware, and software engineering-to create innovative test methodologies that validate complex system-level interactions. Your insights and expertise will directly impact product quality, development efficiency, and time-to-market.

What you will be doing:

Architect end-to-end system validation strategies for new hardware platforms.

Define test coverage and validation methodologies.

Collaborate with hardware, software, Qual and QA teams to align on product requirements and test coverage plans.

Lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.

Analyze test data to identify root causes, guide debug efforts, and improve validation coverage.

Provide technical leadership and mentorship across multidisciplinary teams and represent system test considerations in architecture and design reviews.

We are now looking for a TensorRT-LLM Software Development Engineer! We are hiring software engineers for its TensorRT-LLM team. Academic and commercial groups around the world are using GPUs to power a revolution in deep learning-powered AI, enabling breakthroughs in areas like LLM, ChatGPT and Generative AI that have put DL at the iPhone moment for AI. Join the team which is building the inferencing software which is foundational to product lines within us and across the industry! The ability to work on a fast-paced delivery-focused team is required and excellent interpersonal skills are a must.

What you'll be doing:

Craft and develop robust inference software that can be scaled to multiple platforms for functionality and performance.

Performance analysis, optimization, and tuning for Large Language Models (LLMs)

Conduct unit tests and performance tests for different stages of the inference pipeline.

Closely follow academic developments in the field of artificial intelligence and feature update TensorRT-LLM.

Write safe, scalable, modular, and high-quality (C++/Python) code for our core backend software for LLM inference.

Collaborate across the company to guide the direction of deep learning inference, working with software, research and product teams.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

We are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.

What you'll be doing:

Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.

Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.

Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.

Balance innovation with hands-on engagement in daily DV issues - keeping a strong connection to real-world challenges and support needs.

Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of NVIDIAs industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.

We are seeking a dedicated NVLink Firmware Architect to join our esteemed engineering team in Israel. This is an outstanding opportunity to impact the future of data centers and networking technology. As a key member of our team, you will play a crucial role in developing and crafting our NVLink firmware stack and GPU scale-up networking. Our collaborative environment, combined with ambitious goals, will enable you to collaborate closely with ASIC and software architecture/design teams to pioneer innovative solutions.

What you'll be doing:

Collaborating with a team of innovative engineers to craft new networking applications that address sophisticated problems in groundbreaking ways.

Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architects.

As a Team Leader , Software Engineering within the Web development group you will need to manage execution of complex features include Backend and Frontend edge technologies through a challenging schedule and variable parameters.
In this role, you will
Innovate out of the box designs in order to provide robust and flexible solutions for web and scanner products using web technologies such as Angular & React.
Work with other team for integrating cross functional features and lead activities stretched out on different disciplines within the organization.
Manage the carrier path of your team and provide technical and motivational base for them.
Design, develop and deliver web applications for the world of digital dentistry
Teach, learn, identify, recommend, and implement high-standardized and documented code and features
Act autonomously, provide inputs and suggestions, start new activities to improve our systems and products
Participate as a speaker at internal technical events
Participate in the hiring process to evaluate the skills of candidates

We are hiring a Principal Algorithms Solution Architect to lead innovation in algorithm design and system architecture, delivering transformative solutions in graphics, vision, and AI for our next-generation iTero scanners.
The role is located in Petah Tikva or Caesarea
Key Responsibilities:
Lead and execute cutting-edge algorithmic challenges, driving knowledge and breakthroughs across the company.
Play a pivotal role in shaping our algorithmic strategy and influencing performance outcomes.
Provide guidance, mentorship, and leadership to teams, ensuring successful delivery across multiple projects.
Apply advanced troubleshooting skills and collaborate with R&D and Product teams to resolve complex technical issues and ensure system reliability.
Partner with stakeholders to anticipate future challenges and design innovative solutions.
Participate in all phases of the algorithm development cycle, from concept through deployment.
Identify risks in algorithm and system design and propose effective solutions.
Evaluate existing solutions and recommend improvements to enhance efficiency, scalability, and robustness.
Consistently demonstrate innovative thinking, systemic understanding, and strong cross-team collaboration.
Maintain a strong leadership presence, fostering accountability, growth, and high performance across the organization.