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We are seeking a Platform Engineering Group Lead to strengthen our platform and operational engineering capabilities and ensure the company has a secure, reliable, and scalable foundation for product delivery and operations. This role drives execution, raises engineering standards, and improves consistency across deployment, infrastructure, and operational practices in support of product delivery, customer environments, and internal platforms. The role partners closely with R&D, QA, IT stakeholders, and PS/CS to enable consistent deployments through standards, reference architectures, and high-quality installation documentation.

Your key responsibilities will be:
Lead the Platform Engineering group, including people leadership, prioritization, execution management, and cross-functional coordination, and establish an effective operating cadence for a small, high-impact organization.
Build scalable operating models, ownership boundaries, and execution discipline across platform, deployment, and operational engineering activities.
Drive automation and deployment engineering outcomes across CI/CD, release readiness, environment provisioning, and delivery tooling, with a strong focus on reducing manual steps and operational risk.
Own deployment readiness across internal and customer-facing environments, including staging deployments, validation steps, installation packages, and deployment runbooks, to support consistent and repeatable implementations.
Ensure effective internal infrastructure and workplace technology operations, including service levels, escalation paths, operational hygiene, endpoint lifecycle, backups, and core office/server-room infrastructure.
Drive security and compliance readiness within the groups scope, including operational controls implementation, remediation tracking, evidence discipline, and coordination with external cybersecurity partners and internal security stakeholders.
Establish engineering standards and technical guardrails across infrastructure-as-code, change management, observability, access controls, and backup/restore verification.
Lead incident management across platform, infrastructure, and internal technology services, including issue assessment, prioritization, escalation, incident reviews, and corrective actions to improve reliability over time.
Define and improve deployment patterns, reference architectures, and environment recommendations based on customer constraints and operational requirements to support successful PS/CS engagements.

We are seeking a seasoned Backend Tech Lead with a solid background in high-load environments and experience in managing multiple Linux servers. The ideal candidate is someone who thrives in a fast-paced, innovative, and technology-driven culture.
Responsibilities:
Own architecture for high-scale, user-facing backends and data pipelines.
Lead and mentor engineers; guide design reviews, roadmaps, and execution.
Operate production systems with clear SLOs/SLAs, on-call quality, and blameless postmortems.
Evolve our K8s/GPU platform, CI/CD, and observability to increase deployment velocity and resilience.
Integrate and serve ML models (PyTorch, CUDA/TensorRT, Triton) with a focus on throughput and cost.
Partner cross-functionally (ML, Product, Security, Finance) on priorities and cost/perf trade-offs.
Hire, level up the team, and uplevel engineering standards.

We are seeking a seasoned ASO Specialist to join our amazing growing team where each team member makes an impact.
Responsibilities:
Develop and implement ASO strategies using textual and visual tools on App Store Connect and Google Play for multiple projects, localized in a broad range of languages
Prepare briefs for graphic and motion designers and closely collaborate with them to build engaging visual content (Icons, Promo Screens, Promo Video, Cover Images)
Formulate and test hypotheses to enhance conversion rates
Work with tools like App Store Connect, Google Play, and App Tweak for analytics
Conduct A/B testing in Apps Consoles
Provide regular updates on progress and effectiveness
Potentially, make small contributions to the projects social networks.

Were searching for a Senior Product Analyst to join our elite team and take our data game to the next level. In the past year alone, weve conducted over 200 A/B tests, and were just getting started. If youre a data wizard who thrives on uncovering insights and driving product strategy, this is the role for you.
Want to hear more - check the song at the bottom of this page!
Responsibilities:
Own the end-to-end analytics process, from data collection to insight generation.
Identify trends, opportunities, and actionable insights to fuel our explosive product growth.
Create stunning data visualizations and reports that inspire cross-functional teams to make data-informed decisions.
Lead high-impact testing initiatives to validate hypotheses and shape product development.
Manage and optimize our robust data pipeline to ensure scalability as we continue to skyrocket.

abra is seeking for a Senior ML Platform Engineer . We're looking for a hands-on Senior ML Platform Engineer (MLOps) to build and maintain the infrastructure that powers secure, production-grade AI in an air-gapped environment. In this role, you'll develop and optimize ML pipelines, model serving, experiment tracking, model registries, vector databases (RAG), dataset versioning, and GPU orchestration. You'll work closely with AI developers, data scientists, and software engineers to deliver scalable, secure, and reliable AI solution

We are looking for a Staff QA Architect to join our elite team, contributing to the development of one of our strategic products for Cloud Security.
In your role, you will be responsible for developing and maintaining high-quality work procedures, leading the team to achieve better quality.
You will be involved in the full feature lifecycle - from gathering requirements with the product team to release - ensuring quality at every stage, including bug management and observability and defining QA work procedures, guidelines, and designing the entire testing process.
The ideal candidate will be responsible for leading quality activities across solution-level features, ensuring the highest standards of quality are met. This role requires a proactive individual with excellent leadership and communication skills, capable of driving quality initiatives and fostering a quality-focused mindset within the organization.
Comprehensive understanding of the product's functionality, target use cases, and the value it delivers to customers.
Lead the quality efforts across multiple interfaces with a proactive and assertive approach, serving as the key point of contact for all quality-related matters.
Define, implement, and manage QA processes, promoting a quality-driven culture and managing the quality backlog.
Define the overall testing strategy and tooling stack across integration, regression, and load/performance testing.
Drive an automation-first approach - collaborating with developers to ensure code is testable and observable.
Lead root-cause analysis for escaped bugs and define improvement actions.
Own CI quality metrics and dashboards (e.g., build stability, test flakiness, regression coverage).
Influence decisions regarding test environments, mocks, test data, and production parity.
Collaborate with the centralized quality group to ensure E2E test coverage.
Quality Point of Contact: Serve as the primary point of contact for quality-related matters concerning the unit or the cross-group feature.

As part of your role, you will design, implement, and deploy products and infrastructures that will directly increase our stability and quality while reducing our time to market. You will have end-to-end ownership from individual development environments and SCM/Build/CI servers to our production system on AWS.
Your Impact:
Design and manage Continuous Integration/Deployment Services, including build, packaging, and deployment.
Design, document, implement, and maintain scripts to enhance current and future build and release processes.
Incorporate new development projects into existing build structures.
Continually evaluate tools and technologies to improve the overall release process.

Were building foundational infrastructure to secure AI agents - including their identities, access patterns, and interactions with sensitive systems and data. This includes designing intelligent, dynamic mechanisms for ephemeral access control, secrets management, and agent/user identity tailored to the modern agent ecosystem.
Youll help define how agents (both machine and human-facing) authenticate, obtain scoped access, perform actions securely, and leave a verifiable audit trail.
This is a unique opportunity to be part of a start-up inside the company - building the platform from scratch at one of the most cutting-edge intersections of AI, identity, and security.
Responsibilities:
Own the design and development of secure, scalable services that enable AI agents to manage their identities, secrets, and access - directly protecting critical systems and data.
Take charge of agent authentication flows and real-time access policies, ensuring seamless, reliable just-in-time, least-privilege access.
Lead the evolution of MCPs and agentic AI, transforming innovative ideas into systems that define how intelligent agents operate at scale.
Collaborate with architects and engineers to shape and deliver high-performance platform components you can take pride in.
Write clean, maintainable, and scalable code that powers some of the worlds largest and most security-conscious companies.
Drive cross-functional efforts with platform, AI, and security teams to gather requirements, influence design decisions, and bring impactful solutions to life.

As a QA Engineer , you will play a key role in validating and improving our products, ensuring high quality.
You will join RADs family, as part of our team in Beer-Sheva, collaborating closely with software development teams in an agile and dynamic environment.

Location: Beer Sheva. Hybrid option once a week.

Responsibilities
Design and execute test plans and test cases based on system requirements
Identify, investigate, and report software bugs, while tracking them through resolution
Create and maintain clear test ation and reports
Collaborate with R&D teams to provide QA input throughout the development lifecycle
Communicate risks and quality concerns that may impact future releases

We are building the software foundation for the next generation of AI infrastructure. As AI workloads continue to evolve, Kubernetes and the cloud-native ecosystem must evolve with them.

Our teams mission is to make Kubernetes the best platform for AI workloads. We work upstream with the Kubernetes and CNCF communities to design new APIs, build production-grade implementations, and shape the future of cloud-native infrastructure for AI.

As a Senior Software Engineer, you'll tackle the most challenging problems at the intersection of Kubernetes, distributed systems, and AI infrastructure.


What you'll be doing:

Design, implement, and upstream new capabilities for Kubernetes and CNCF projects.

Collaborate with engineering teams across us to identify AI infrastructure challenges and solve them through upstream innovation.

Work closely with Kubernetes SIGs, Working Groups, and the broader open-source community to design and implement new capabilities.

Participate in architecture discussions, API design, technical proposals, and code reviews.

Build reliable, scalable infrastructure software for next-generation AI workloads.

Write clear technical documentation and design proposals.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon engineering team. We are developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join accelerators IP group in Beer-Sheva, working on RiscV processor IPs.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development: Verification, Design.

Work closely with Firmware and other groups around the globe.

We are seeking a Front-End Integration Engineer for the NIC Silicon group. Join our team in our Networking business unit and be part of the innovative build and implementation of the next generation Network Adapter Silicon chips. Contribute to the development of powerful communication devices.

What You'll Be Doing:

Own and maintain Continuous Integration pipelines. Monitor, complete, and fix daily and nightly CI flows in front-end build areas. These include Lint, Synthesis, Equivalence Checking and Simulation.

Automate EDA Flows: Build, develop, and maintain robust automation scripts using Python, Tcl scripting, and Shell to integrate EDA tools (Synopsys, Cadence) into automated build pipelines.

Manage Perforce Integration: Maintain multi-IP branch/stream strategies, manage workspace specs, complete hardware build drops, and handle release labels/tags in Perforce (Helix Core).

Support Engineering Teams: Act as the primary point of contact for RTL and verification engineers to debug flow crashes, bottlenecks, environment setups, and CI failure reports.

Enforce Quality Gates: Implement automated check-in and change list triggers to run sanity checks, linting, and style enforcement before code is committed to main streams.

Optimize Infrastructure: Monitor compute farm resources (LSF) and storage usage to reduce pipeline runtime and improve overall execution efficiency.

We are rapidly growing into new verticals, and we are seeking a visionary Developer Relations Senior Manager to broaden our impact. In this regional leadership role, you will champion Israels growing AI ecosystem, managing a high-performing team of Developer Relations Managers.

You will lead technical projects in GenAI/ML application development, consumer internet, and embedded AI systems. Working at the crossroad of engineering, strategy, and community, you will promote our hardware and SDK offerings. This role supports faster adoption of GPU-accelerated technologies by developers, startups, and ISVs. If you are a technically fierce, highly autonomous leader who thrives in a matrixed environment and wants to build the future of AI, let's talk.

What Youll Be Doing:

Lead & Mentor: Guide, collaborate and encourage a regional team of Developer Relations Managers covering Israel's dynamic AI ecosystem.

Drive Technical Strategy: Architect and complete a comprehensive developer adoption strategy for key industries, ensuring our platforms remain the gold standard.

Build Technical Alliances: Establish deep, positive relationships with CTOs, engineering leads, startups, and ISVs within the local ecosystem.

Evangelize & Accelerate: Act as the ultimate technical mentor and focal point for the developer community. Help developers unlock the full value of our SDKs and hardware to solve complex, real-world problems.

Champion the Community: Lead our presence at targeted developer events, hackathons, and industry activities.

Bridge the Matrix: Collaborate across internal product divisions, sales geographies, solution architects, and marketing teams to align our local ecosystem strategy with global value messaging.

The System-On-Chip (SOC) group is looking for a strong RTL Design Engineer to own the SOC clocking logic for our next-generation networking chips. Clocks are the backbone of the SOC. In this role you will own the clock generation, distribution, and control logic for the entire chip - PLL and reference clock integration, clock muxing and dividers, glitchless switching, clock gating, reset synchronization, and the clock domain crossing infrastructure that every unit on the die depends on.

This is an RTL design role, not a circuit or transistor-level design role. You will translate micro-architecture specifications into high-quality synthesizable RTL, and drive that RTL through to silicon in close partnership with the micro-architecture, Design Verification, and Physical Design (backend) teams. You will also interact with CAD, Package Design, Software, and DFT teams.

What you'll be doing:

Owning the SOC clocking logic end to end: writing synthesizable Verilog/SystemVerilog RTL for clock generation, distribution, muxing, division, glitchless switching, gating, and reset synchronization, from micro-architecture specification through tape-out.

Defining and implementing the SOC clock and reset architecture together with the micro-architecture team - collecting clocking requirements from every unit on the chip and turning them into a coherent, verifiable design.

Owning clock domain crossing infrastructure and CDC closure across the SOC.

Partnering with the micro-architecture team to review specifications, close on design intent, and provide feedback on implementation cost, timing, area, and power.

Working hand-in-hand with the Physical Design (backend) team on clock tree implementation and constraints, partitioning, floorplan and timing feedback, trial synthesis, congestion and timing convergence, and physical design readiness.

Supporting Software and firmware teams on clock programming sequences, DVFS, and low-power/clock-shutdown flows.

Driving design quality: lint, CDC/RDC, formal checks, synthesis QoR, connectivity and structural checks.

Supporting SOC-level chip build and assembly, and developing/deploying automation flows that make RTL integration and design quality checking repeatable and scalable.

Supporting emulation, firmware, and post-silicon bring-up customers of your design.