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our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people.
Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team that is building AI platform for operating AI factories to make a lasting impact on resilient operations of AI clusters.
What will you be doing:
You will bring together and understand internal and external customer requirements to improve AI cluster resiliency and design AIOps-based solutions that address these needs.
develop automated workflows for issue detection and root cause analysis and closely collaborate with operators to debug sophisticated, full-stack AI cluster problems. We will bring to bear the findings for product improvements!
deliver compelling technical presentations and lead hands-on demos or training. You'll also handle evaluation deployments (POC/POV) and ensure smooth, reliable installations by staying engaged and encouraging throughout the customer journey.

We seek a V&V Engineer with a strong background in validation to join the Interconnect validation team. This position will be part of the Product Engineering team that crafts and integrates software tests for our company networking products into the production lines. You will handle various projects across teams, complete new lab setups, review the HW design, build validation plans, implement automated tests, perform manual scenarios, and report bugs. Are you passionate about attention to detail and taking ownership of end-to-end validation for our company interconnect products? Join our team and bring your expertise to life!
What you'll be doing:
Collaborate with multi-functional teams across engineering, software development, and HW to identify test requirements
Define and build setup topologies for appropriate product coverage
Build a validation plan, complete, and integrate tests for the new interconnect products to address the business needs
Debug SW & HW failures during the validation and take action to address it
Report bugs found during validation, assist with reproduction, and debug to understand the root cause, and follow up to close it
Deploy the product validation into the nightly automation tests and track during the daily meeting.

our companys Product Engineering group is looking for an experienced Electronics/System engineer to serve as a Technical Project Leader (TPL), join our organization, and be a part of the System Product Engineering organization. The team delivers brand new, high-quality products to our company's customers, applying the following: Development and deployment of automatic testers for our companys network business units (Computing network adapters and High-speed switch systems) including hardware, software, and mechanics; Coordinating and leading all aspects of the analysis of manufacturing data to identify and mitigate quality issues using advanced data analysis techniques such as machine learning, statistical tools, and AI; Leading smooth production and capacity enlargement and failure analysis of return material from customers to understand the reason for failures ;Validating test performance and stability using QA (V&V - validation and verification) methods; The TPL leads projects from requirement until end of life; Engineering manager for SPE projects and technical authority across SPE teams
What youll be doing:
Building integration plans, communicating status and priority among the teams (in/outside of SPE), assessing risks and developing mitigation plans
Leading the project lifecycle in the SPE group, which starts at the requirements stage, through chip design and FW stages till SPE MP, including quality and yields improvement plans
Responsible for bugs management prioritization and tracking and relevant knowledge transfer to the SPE group
Working closely with development teams for environment improvements, such as automation, and driving mitigations to reduce risks
Collaborating with PM for schedule tracking and modifications
Evaluating new technologies and testing capabilities for improvement
Working with the testing architecture team (DFT) to assure testing setups and coverage are met
Engaging with a variety of teams: R&D, HW and SW, Chip design, Operations, thermal, signal integrity, FW and SW, layout, and more, Report project status for high level management.