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25/05/2025
Location: Herzliya
Job Type: Full Time
A leading supplier of custom SoCs and security hardware solutions in the computing and servers' domain. As a self-contained design center, we work closely with major OEMs, to develop innovative solutions that incorporate control, management, and advanced security features. We are looking for an Experienced Chip Architect with extensive experience in HW and system architecture to join our team.
The ideal candidate will be a technology leader in multidisciplinary programs, working closely with major customers and internal teams throughout the product lifecycle.
Responsibilities:
Engage in technical discussions with customers alongside Marketing to refine product requirements
Translate customers' requirements and expectations into detailed chip architectural specifications that enable market differentiation
Provide functional specifications for chip hardware design and Embedded software development
Serve as a center of knowledge and key contributor for all functional teams throughout the project lifecycle
Support design and implementation processes
Participate in design reviews and verification / validation plan reviews Assist in system debug and problem resolution
Support post-silicon integration and software development.
Requirements:
BSc or MSc degree in electrical / computer engineering
5+ years of proven experience in SOC architecture - Must
Strong VLSI design background - Must
Experience in board/ system design and integration - Advantage
Experience in Embedded software - Advantage
Experience with interfaces (e.g., USB, SPI, I2C, etc.) - Advantage
Strong interpersonal skills, analytical abilities, and professional leadership
Ability to work effectively in a multi-disciplinary team.
This position is open to all candidates.
 
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8120080
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04/06/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a motivated Chip Architecture Engineer to use your creativity to work on the Spectrum Switch with a highly inventive and knowledgeable team.

Our technology has no boundaries! NVIDIA is building the worlds most groundbreaking and state of the art compute platforms for the world to use. Its because of our work that scientists, researchers and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, it is energy efficient! We pioneered a supercharged form of computing loved by the most fast paced computer users in the world - scientists, designers, artists, and gamers. Its not just technology though! It is our people, some of the brightest in the world, and our company diverse culture make us one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence and determination and team, which guide us to be the best we can be.

What you'll be doing:

Be part of the team that defines the Spectrum Switch chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments).

Be part of the team that defines the GPU interconnect protocol, and defines the Architecture for GPU interconnect.

Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications).

Perform research and analysis for current and future architectures.

Develop Proof of Concepts using our technology, collaborating with our most sophisticated customers on state-of-the-art innovations.
Requirements:
What we need to see:

B.Sc. in Electrical or Computer Engineering.

3+ years of relevant experience

Programming skills.

Knowledge and understanding of computing and networking systems.

Your can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast pace environment.

You have the utmost passion for attention to detail on design and a high focus on design quality.

Ways to stand out from the crowd:

Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8204145
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Location: Hod Hasharon and Haifa
Job Type: Full Time
Required Senior Memory Subsystem Architect
Job Description:
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Hod Hasharon
Job Type: Full Time
Required System/Firmware Architect/Engineer for the Switch Architecture team
Job Description
Member of the System/Firmware architecture team.
Definition of our next generation Packet Processor Architecture for high-performance complex SoC Ethernet Switches, Smart NICs etc.
Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
Architecture definition and development of real-time embedded Dataplane/Datapath firmware for multiple networking protocols on top of the Packet Processor Architecture.
Working closely with the Chip/VLSI architecture team and SW tools team on the device requirements, HW/SW I/F definition, integration & optimizations.
Requirements:
BSc/MSc/PhD in Electrical/Computer Engineering/Computer science or a related field.
5+ years of experience in real-time embedded Dataplane/Datapath System/Firmware architecture, design and programming for high speed networking (such as: Ethernet Switch, NPU, NIC SoCs (C, Assembler, etc)).
Familiarity with network and communication protocols (Ethernet, IP, Bridging, Routing, MPLS, VXLAN, Telemetry (e.g. IOAM, etc), RDMA, ROCEv2 etc).
Skills:
Excellent communication skills in English - written and verbal.
Good team player - Excellent communication and good team working skills; the ability to work with people at all levels.
Independent and self-learning.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.

What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.
Requirements:
What we need to see:
BSc or MSc degrees in EE or equivalent experience from known universities.
At least 5+ years of work experience in RTL design, Gate-Level and Circuit design optimization.
Deep understanding of logic optimization techniques and PPA trade-offs.
Excellent interpersonal skills and ability to collaborate with multiple teams.
Excellent problem solving and debugging skills.

Ways to stand out from the crowd:
Prior experience in RTL design (Verilog), verification and synthesis.
Clock IPs profound knowledge: PLL, DLL, Compensator.
Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a bonus. Prior experience in implementing on-chip clocking networks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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