דרושים » מדעים מדוייקים » Radar Signal Processing and Algorithms Architect

We are looking for an Algorithm Developer who will be challenged to solve real-world problems using Computer Vision and Signal Processing techniques. Our mission in the Algorithms department has a significant impact on autonomous driving technologies and on saving lives.
In this position, you will combine classic programming and algorithm development in Python and C++, and be responsible for maintaining the product and developing new features. As an Algorithm Developer, you will learn and develop new algorithms that can address new problems and challenges as they arise.
The work in our algorithms department is dynamic and involves developing algorithms from the early stages of research through to production, while collaborating with other teams throughout the organization.
What will your job look like:
Your job will include a combination of classic programming and algorithm development.
You will develop in both C++ and Python.
You will need to both maintain the product and develop new features.
You will need to learn and develop new algorithms that can address new problems as they arise.

we are a leading manufacturer of medical imaging devices. our companys Point of Care Ultrasound Algorithm team is looking for an experienced AI Algorithm Developer to take ownership of challenging imaging and guidance problems.
You will develop algorithms that connect physical imaging processes, clinical needs, and product behavior. The role combines hands-on algorithm development with independent technical judgment, close collaboration across disciplines, and responsibility for delivering reliable results.
We are looking for someone who wants to understand why a solution works, recognize where it fails, and take responsibility for improving it.
Job Description
Responsibilities
Independently own algorithm workstreams, from understanding the problem and defining the technical approach through implementation, evaluation, and integration.
Translate clinical and product needs into clear algorithm requirements, measurable success criteria, and practical development plans.
Develop solutions combining deep learning, computer vision, image processing, and mathematical modeling, selecting methods appropriate to the problem.
Understand how imaging physics, acquisition geometry, artifacts, and system constraints affect the data and algorithm behavior.
Define data and annotation requirements, design reproducible experiments, investigate failure cases, and use findings to guide improvements.
Work with software, imaging, clinical, and product teams to resolve dependencies and balance accuracy, robustness, latency, and computational requirements.
Use generative AI tools thoughtfully to accelerate research, coding, testing, and analysis, while verifying outputs and retaining responsibility for technical decisions and results.
Deliver maintainable code and clear technical documentation supporting integration, verification, and regulatory activities.

we are looking for a Staff Systems Engineer.
As a Staff Systems Engineer, you will be a critical contributor on our Electrophysiology Systems Engineering team focused on delivering the future in Advanced Imaging. This role will involve a range of responsibilities including but not limited to collaborating and leading teams in the strategy, development and analysis of system architecture, system performance and system integration for our next generation products including various imaging modalities such as echocardiography, CT, MRI, and 3D cardiac mapping. In this role you will be a key member of product development team to bring systems from concept to launch.
Duties and Responsibilities:
Define and influence, and drive execution of technical strategy for system-level programs while partnering with cross-functional stakeholders on business strategy and product roadmaps.
Utilize multidisciplinary engineering knowledge and experience to design, develop, and troubleshoot new products specific to cardiac mapping and advanced imaging.
Provide system engineering leadership and take ownership for overall project success for new products and features from concept phase through launch.
Work with Product Marketing, Clinical Engineering, and Key Opinion Leaders to develop design input requirements from user and business needs.
Communicate with Sr. Management including technical presentations, status updates, and program reviews.
Lead project-level system architecture, system behavior definition, and tradeoff analysis activities utilizing Model-Based Systems Engineering (MBSE) methodologies, including use case modeling, requirements traceability, system architecture modeling, and interface definition.
Lead cross-functional working groups to solve complex problems, mitigate risks, and develop strategies to overcome challenges.
Plan, manage, and report on overall systems integration activities including root cause analysis and solution generation.
Identify, communicate, and proactively manage technical, integration, and program risks throughout the product development lifecycle.
Provide input into the technology and product roadmaps.
Be a strong team player and lead cross-functional teams to resolve issues and meet budget and schedule requirements.
Create a positive, collaborative culture amongst the technical teams while working to solve challenging engineering problems.
Mentor engineers across multiple disciplines and serve as a technical leader driving engineering excellence, sound systems thinking, and effective technical decision-making.
Ensure compliance with procedural and documentation requirements of , FDA, ISO and other regulatory bodies.

We are seeking an experienced Senior Real-Time Embedded Software Engineer to join our core engineering team and develop advanced software for high-performance, mission-critical embedded systems.

Key Responsibilities
Own tasks, infrastructure, and subsystems end-to-end, from requirements analysis and system modeling through design, implementation, testing, integration, and deployment.
Design, implement, integrate, and optimize real-time software for MCU-based platforms.
Translate system-level requirements into robust and efficient software solutions.
Lead software integration and validation on target platforms, including troubleshooting and system bring-up.
Contribute to the development and improvement of software infrastructure and platform-level capabilities.
Work closely with Hardware, Algorithms, and System Engineering teams within a multidisciplinary R&D environment.
Collaborate with relevant stakeholders to drive tasks and projects forward efficiently.

Required Senior Verification Engineer, Digital Signal Processing, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you own the verification strategy for high-speed Physical Layer (PHY). You aren't just looking for RTL bugs, you are looking for system-level failures. You will lead the effort to verify how the digital DSP interacts with the analog front-end.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the verification strategy for high-speed PHYs (112G/224G), defining the test plan for top-level integration and mixed-signal boundaries.
Architect and implement mixed-signal verification flows using Real Number Modeling (RNM) or SystemVerilog-AMS to verify the interaction between Analog Front Ends (AFE) and digital DSP.
Design specialized testbenches to verify the stability, convergence time, and tracking capabilities of adaptive algorithms (e.g., LMS, Zero-Forcing) across Process, Voltage, Temperature (PVT) corners.
Develop tests that simulate real-world data center conditions, including link bring-up, auto-negotiation, and error-recovery protocols.
Act as the primary verification interface for the Signal integrity and Power Integrity (SI/PI) and Analog teams, ensuring that physical channel impairments (loss, crosstalk, reflections) are accurately reflected in the Design Verification (DV) environment.

Required SoC Test Automation and Infrastructure Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our data centers are the most advanced in the world. In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high-volume manufacturing at wafer fabrications and Outsourced Semiconductor Assembly and Test (OSATs). You will have an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next-generation of chips.
You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices, drive yield improvement, cost optimization and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs
You will have a strong understanding of IC flows, wafer processing, testing, qualification, diagnostics and failure analysis. You will work with various groups to deploy screening methodologies and flows for data processing, analytics and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
Responsibilities:
Provide tools, set the environment and create automation to silicon engineering (SiEng) teams, collaborate with Test, Product, quality and reliability (Q&R) and system-level test (SLT) teams.
Create smooth and effective ways to manage silicon engineering (SiEng) datastream to and from suppliers and internally, between different platforms, while optimizing formats and datalogs, convert per need.
Verify test solutions on pre-silicon models (simulation or emulation) and support Automated Test Equipment (ATE) test development setup and environment.
Develop test method for ATE platforms.
Provide pre and post silicon dashboards and indicators that will reflect the status, demonstrate progress and point on the gaps.

We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs.
In this role, you will execute package layout tasks from floor planning through tape out and manufacturing release, working closely with senior engineers, SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance, density, and reliability targets.

Key job responsibilities
- Execute package layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
- Implement physical designs for advanced packaging architectures including 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
- Support package floorplan development considering die placement, bump maps, power/ground distribution, signal escape routing, and decoupling capacitor placement.
- Perform RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
- Support die-level RDL routing and bump planning in coordination with ASIC physical design teams to help co-optimize the die-package interface.
- Contribute to cross-level layout co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
- Assist in maintaining package stack-up definitions in collaboration with SI/PI and materials engineering teams.
- Run physical verification checks (DRC, connectivity, shorts/opens) and support design closure.
- Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
- Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout - impedance-controlled routing, power plane optimization, and critical net shielding.

Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.