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Location: Caesarea
Job Type: Full Time
The HW Board Design team is at the heart of our hardware development lifecycle, ensuring that every design is robust, testable, and ready for high-volume production. We bridge the gap between initial architecture and final qualification, playing a critical role in delivering high-quality networking solutions that power the internet. Our team is a collaborative group of technical experts who thrive on solving complex signal and power integrity challenges in a fast-paced, innovative environment. Joining this team means working on cutting-edge technology where your leadership directly impacts the reliability of global systems. We value a proactive, team-oriented mindset and a passion for engineering excellence.

Your Impact:
You will be responsible for leading hardware board design activities with a strong focus on test, qualification, and readiness for production. This role spans all phases of hardware development, from architecture and design through bring-up, validation, and qualification, combining deep technical expertise with leadership and cross-functional coordination.

Lead and mentor the hardware engineering team focused on board design, test, and qualification.
Define hardware architecture and board-level design strategy with test, qualification, SI, and PI requirements in mind.
Oversee schematic design, PCB layout, and component selection.
Review designs for quality, reliability, cost, manufacturability, testability (DFM/DFT), signal integrity (SI), and power integrity (PI).
Own test readiness, including support for bring-up, debugging, validation, and qualification.
Manage schedules, task prioritization, and resource allocation.
Work closely with FW, SW, mechanical, QA, test, and manufacturing teams.
Drive design reviews, SI/PI risk analysis, and technical decision-making.
Support transition from prototype to qualified hardware and production release.
Ensure compliance with relevant standards and qualification requirements.
Requirements:
Minimum Qualifications:
Bachelors degree in Electrical Engineering.
5+ years of experience in hardware board design and development.
3+ years of experience in a technical leadership or management role.
Proven experience with Signal Integrity (SI) and Power Integrity (PI) analysis and debug.
Experience with PCB design tools and reviewing complex, high-speed layouts.

Preferred Qualifications:
Familiarity with high-speed interfaces and SI/PI best practices.
Hands-on experience with lab equipment (oscilloscope, logic analyzer, etc.).
Strong knowledge of digital, analog, and power circuit design.
Proven experience leading or mentoring engineers.
Strong problem-solving and decision-making skills.
Clear communication and documentation skills.
Ability to manage multiple tasks and meet aggressive schedules.
Proactive, accountable, and team-oriented mindset.
Experience supporting manufacturing, test, and working with suppliers.
This position is open to all candidates.
 
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2 ימים
Location: Yokne`am
Job Type: Full Time
We are looking for an experienced, forward-thinking, focused, analytical, and motivated Engineer to take ownership for the NPI and suppliers management in order to meet company targets. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which NV products acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. Youll be immersed in a diverse, supportive environment where everyone is encouraged to do their best work. Come join the team and see how you can make a lasting impact on the world.

What you'll be doing:

The NPI engineer will work alongside with R&D BU, finance, engineering and various multi-functional teams, leading NPI products from am operational perspective.
Work with our partners worldwide to establish a supply chain incorporating business, manufacturing, technology, Engineering, quality, and additional aspects to assure design acceptance and manufacturability
Identify critical-paths, bottlenecks and implement risk management methodologies.
Define and lead execution to ensure delivery on schedule according to SOW and budget.
Pave the way for NPI Production transition: Active participation from very early pre-design stages, highlighting needed operational related aspects while defining the infrastructure for the future transfer to production stage.
Develop an in-depth understanding of the vendors manufacturing capabilities and influence current and future product qualifications and loading decisions
Develop and implement project management methodologies and processes to improve tracking, transparency, execution, and day-to-day efficiency
Report program status to senior management.
Requirements:
What we need to see:
B.Sc. in Industrial/Electrical/Material engineering or a related field.
Strong engineering background with business and operations proficiency.
8+ years of proven experience in leading sophisticated, highly technology-intensive projects.
Sharp thinking, attention to details, and outstanding decision-making skills
Independent and proactive approach - being able to own a task but also to deep dive into the relevant details surrounding it.
Performs well in an intensive environment - Working hour flexibility (working with global parties).
Ability to manage schedule and meet deadlines.
Multitasking, good interpersonal skills and a team player.
Fluent English - reading, writing, and speaking.
Proficiency in Microsoft Office tools including Word and Excel.

Ways to stand out from the crowd:
Experience with supply chain management.
Vast Semiconductor experience and global market.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8566034
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08/02/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

3+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8536443
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19/02/2026
Location: Herzliya
Job Type: Full Time
Power the Future with us! Atour company, we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. we offer amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. Are you passionate about designing high-performance power systems that move from concept to mass production? Join us and take a leading role in shaping our next-generation flagship products! What Youll Do:
* Lead the end-to-end development of advanced power electronics hardware - from architecture and schematic design through validation and mass production.
* Own complex board-level designs, driving performance, reliability, and cost optimization.
* Design, simulate, build, TEST, debug, and bring to life robust power solutions under real-world constraints.
* Collaborate in a multidisciplinary R&D environment alongside Mechanical, Software, system, and Certification teams.
* Influence product architecture and technical direction with hands-on engineering excellence.
* Ensure on-time delivery of high-quality, production-ready designs. Why Join Us?
* Work on impactful, market-leading products.
* Be part of a highly collaborative, multidisciplinary engineering culture.
* Take real ownership and influence technical decisions.
* See your designs transition from concept to millions of units in the field.
Country:
Israel
City:
Herzliya
Requirements:
* B.Sc. in Electrical Engineering.
* 4+ years of hands-on experience in circuit and board design (power electronics preferred).
* Strong lab experience - Oscilloscope, Spectrum Analyzer, Electronic Loads, and other validation equipment.
* Experience with simulation tools such as LTspice, PSpice, MATLAB, or equivalent.
* Deep knowledge of analog design, LCR components, filters, and op-amps.
* Solid understanding of DC-DC converter topologies (Buck, Boost, Flyback, etc.).
* Experience with OrCAD (Allegro, Capture) or similar PCB design tools.
* Magnetic design and simulation experience - an advantage
* Background in control theory and experience working with microcontrollers - an advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8553654
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
We are seeking a CAD Engineer to join the Physical Design team.

You'll be joining our Physical Design team within us, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
Minimum Qualifications:
A VLSI Design Engineer with extensive experience in backend design.
B.Sc./M.Sc. in Electrical Engineering or Computer Engineering with relevent background.
5+ years of hands-on experience in a relevant domain.
Strong understanding of Place & Route flow.

Preferred Qualifications:
Deep understanding of Physical construction and Integration.
Knowledge of Physical Design Verification methods like LVS/DRC and formal verification.
Experience with PD CAD and Physical Design EDA tools (e.g., Synopsys, Cadence).
Ability to support technology adoption and new tool integration.
Great teammate, self-learner, and able to work independently.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8546220
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
05/02/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part in flows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of experience in Physical Design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Strong background of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8533985
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דיווח על תוכן לא הולם או מפלה
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תיאור
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
08/02/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

2+ years of experience.

Proven experience in RTL2GDS flows and methodologies. (advantage)

Knowledge in physical design flows and methodologies (PNR, STA, physical verification). (advantage)

Deep understanding of all aspects of Physical construction and Integration.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8536494
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
08/02/2026
Job Type: Full Time
we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. What will you be doing:
* Taking part in the development of the companys flagship products
* Responsibility for the development from the design stage to the final product, including all tests necessary to deliver the product to mass production (electronic tests, thermal tests, EMI tests).
* Working with other teams inside the Hardware division and outside of it (such as the Mechanical department, Software and more)

Country:
Israel
City:
Modiin
Requirements:
* B.Sc. in Electrical engineering
* At least 3-year experience in power electronics
* 3+years of experience in circuit design and HW board design
* Knowledge in Analog circuits and Op Amps behavior - Must.
* Proven experience working with lab equipment such as Spectrum, Scope, Electronic Loads act.
* Knowledge of DC2DC converter topologies such as Buck, Boost, Flyback and forward
* Experience in designing Flyback DC2DC converters - Advantage
* Knowledge in Orcad, Visio and Pspice - Advantage
* Feedback control loop knowledge - Advantage
* Knowledge in EMI requirements and design - Advantage
* Knowledge in magnetic design - Advantage
* 1+years of experience in circuit design and HW board design - Advantage
* Knowledge in power layout design - Advantage
* Passionate for power electronics.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8536431
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
Location: Rosh Haayin
Job Type: Full Time
Were looking for a highly experienced and motivated VLSI Manager to lead the development of our next-generation ASIC-from initial concept to final production. In this pivotal leadership role, you will own the full ASIC lifecycle, drive execution across global teams, and partner with cross-functional stakeholders to deliver cutting-edge silicon that shapes the future of autonomous vehicles.
What Youll Do
Own and lead the end-to-end ASIC development process
Serve as the central point of contact for all ASIC-related activities across Product, Firmware, Computer Vision, Hardware, and R&D stakeholders
Drive the ASIC program work plan, ensuring alignment and coordination across global teams and multiple workstreams
Define and enforce VLSI development methodologies, design flows, and quality standards
Evaluate, select, and integrate both digital and analog IPs required for the ASIC
Manage relationships and deliverables with external VLSI partners and service providers
Ensure high-quality execution, risk management, and delivery across all project phases.
Requirements:
B.Sc. in Electrical Engineering from a recognized institution
Minimum 7 years of hands-on experience in microarchitecture and RTL design
At least 3 years in a leadership role managing ASIC teams or projects
Proven experience leading ASIC programs from concept through production
Deep understanding of the full ASIC development lifecycle and technical requirements
Strong experience in digital IP and SoC design, verification, and implementation methodologies
Proficiency with industry-standard EDA tools (Lint, CDC analysis, simulation, debugging, synthesis, timing closure)
Excellent communication, leadership, and interpersonal skills
Bonus Points
Familiarity with functional safety standards (ISO 26262)
Experience with multi-core SoCs and security architectures (e.g., HSM)
Background in computer vision, DSPs, or automotive systems
Knowledge of automotive protocols (CAN, Automotive Ethernet, FlexRay, AUTOSAR)
Experience with embedded software and low-power design techniques
Prior collaboration with external back-end design teams
Exposure to optical systems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8561325
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead a complex ASIC subsystem and understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Implement designs in SystemVerilog.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience architecting networking ASICs from specification to production.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience working with software teams optimizing the hardware/software interface.
Proficiency in TCP, IP, Ethernet, PCIe, DRAM, Network on Chip (NoC) principles and protocols.
Proficiency in a procedural programming language (e.g., C++, Python, Go).
Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8544206
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
5 year of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience with associated EDA tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog (for design).
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Understanding of RTL to emulation/FPGA flows including emulation test benches (e.g., transactors/accelerated VIPs, hybrid, in-circuit emulation).
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
This position is open to all candidates.
 
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8545227
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture (ARCH) and multiple production teams.
Provide a quality functional coverage for our company designs.
Test Development and Automation, Design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++) to verify SmartNIC functionality and performance.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related field, or equivalent practical experience.
5 years of experience with functional tests for silicon validation (i.e., writing in C or C++).
5 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Experience and knowledge in packet processing, data path, packet buffering, scheduler, networking protocols offload engine.
Knowledge in L1/L2 layers, Ethernet SerDes, MAC+PCS.
Knowledge of System on a chip (SoC) architecture, including boot flows and embedded processors/firmware.
Ability to focus on validating key features, including Ethernet interface (SerDes, MAC + PCS) PCIe high-speed interface, network protocols (e.g., Ethernet, RDMA, NVMe), packet processing, data path, packet buffering, and embedded processors/firmware.
This position is open to all candidates.
 
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8544195
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7 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior ASIC Physical Design Engineer to join our dynamic team, Join the ride as we spearhead the next revolution in electronics!
What Youll Do
Own and continuously improve our smooth product backend integration methodology, flows, and best practices using Cadence and Synopsys tools.
Develop, maintain, and scale automation and infrastructure (TCL / Python) to improve quality, predictability, and turnaround time.
Collaborate closely with multiple teams to ensure smooth handoffs and high-quality product.
Support field teams on complex technical issues when needed.
Responsibilities
Implementation of ASIC units using advanced flows
Developing BackEnd methodology using Cadence and Synopsys tools
Build and develop scripts for physical design implementation
Support Field team with customer issues.
Requirements:
8+ years of hands-on experience with ASIC physical design (RTL-to-GDS).
Proven experience taking multiple full-chip SoCs from RTL through tapeout.
Deep knowledge of Cadence and/or Synopsys backend flows (experience with both is a strong plus).
Strong understanding of PnR, timing closure, SI, power, DRC/LVS, and signoff.
Excellent debugging and problem-solving skills.
Strong scripting skills in TCL and Python.
Nice-to-have / Advantage
Experience with multiple power domains and low-power design techniques.
Background that spans both frontend (RTL) and backend.
Experience influencing or defining methodology across teams or projects.
Personal skills
Innovation, quick learning abilities
Team player
Commitment, full ownership of tasks
Excellent communication and presentation skills
Customer orientation
A strong sense of ownership.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8560941
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08/02/2026
Location: Yokne`am
Job Type: Full Time
Join our Networking Silicon team as a Senior Full-Chip Design Verification Engineer. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level. You will contribute to the architecture of high-speed communication devices by building advanced simulation platforms and driving full-chip verification execution for the networking solutions powering the worlds most advanced data centers.

What youll be doing:

Full-Chip Verification & Execution: Own complex system-level features by defining verification plans and driving the end-to-end execution.

Software Simulation Development: Architect and code robust software simulation platforms that serve as the foundation for Firmware development and uArchitectural research.

AI-Enhanced Engineering: Accelerate development by leveraging cutting-edge AI coding tools and frameworks.

Global Technical Collaboration: Partner with Architecture, FW, and SW engineering teams across the globe to deliver industry-leading networking solutions.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

8+ years of experience in Verification or HW simulation.

Knowledge in SoC architecture, network protocols - advantage.

Innovation Mindset: A proactive approach to adopting new methodologies and coding tools to solve complex challenges.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8535842
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Location: Hod Hasharon and Haifa
Job Type: Full Time
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.
This position is open to all candidates.
 
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