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We are seeking an experienced C++ Developer with a strong background in building sophisticated systems to join our innovation group. This role focuses on developing a Browser Detection and Response (BDR) System aimed at enhancing browser security for users worldwide.
Key Responsibilities:
Design, develop, and maintain new complex C++ features with an emphasis on chromium browser security and internals.
Collaborate with teams across the world for productization
Contribute to the innovation and enhancement of security features within browser technologies.
Why Join Us:
Work on projects impacting billions of users.
Collaborative and innovative environment.
Competitive salary and benefits.
Flexible Hours Full or part-time, ideal for students!

We are looking for outstanding candidates with hands-on experience in software development. If you are a team player with excellent communication skills and motivation to investigate state-of-the-art directions and revolutionize application performance, youre welcome on board!
What will you be doing?
Envision, design and develop new features in all layers of the HPC / AI stack, from the application level, through the programming model (e.g. OpenMP, MPI) and down to the supporting libraries/middleware
Research, design and implement features for HPC / AI applications using parallel programming models (e.g. OpenMP, MPI), accelerators offloading and memory tiers.
Contribute to open-source scientific computing, networking and I/O libraries
Research, design and assist in developing hardware offloads for features relevant for scientific, deep learning, and data-intensive workloads.

We are looking for outstanding candidates with hands-on experience in development and optimization of AI frameworks. If you are a team player with excellent communication skills and motivation to revolutionize application performance, youre welcome on board!
What will you be doing?
Work as part of an innovative research team to analyze, develop, test and deploy improvements that enhance Huaweis distributed AI framework.
Develop optimizations that leverage hardware accelerator capabilities, minimize communication overhead and improve training/inference throughput
Push the boundaries of the state of the art in LLM performance and efficiency, including model compression and quantization
Analyze, profile and optimize the latest LLM AI algorithms, and implement as production-quality software libraries for latency-critical use-cases on next-generation hardware.
Work in a distributed computing environment to optimize for both scale-up (multi-device) and scale-out (multi-node) systems
Utilize advanced concepts such as Uncertainty Quantification, Mixed Precision Computing and Model Sparsity to improve performance and enable training of very large AI models
Collaborate with partners from top universities, and open-source communities to conduct state-of-the-art research

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools.
Responsibilities:
Develop and analyze performance and power features in our cycle accurate pre-silicon model and improve the accuracy of the current Server system simulator
Design the architecture of the new generation system simulation platform that will be used to analyze performance of Server (Compute and AI) workloads and identify performance bottlenecks
Develop new technologies, methodologies and tools for simulation. Analysis and debug of applications and workload on Huawei servers
Propose and simulate optimizations and innovations on the HW and SW in order to improve server performance for given workloads
Distribute the simulation platform, train and support other teams in China and in Europe using the simulation platform, technology and methodology

Were developing advanced cyber-defense technology that operates deep in the operating system where performance, reliability, and security converge. As part of our core R&D team, youll design and implement low-level components for Linux and Windows kernels, driving the intelligence behind our next-generation EDR/endpoint protection platform.
Youll work on complex OS internals, create innovative security hooks, and collaborate with researchers to transform detection ideas into real-world protection.
Responsibilities:
Design and develop Linux kernel modules/drivers (LSM/eBPF/net/FS/process monitoring).
Build high-performance, tamper-resistant agent components for large-scale endpoint deployment.
Own full development lifecycle: architecture, PoCs, implementation, testing, performance tuning, and deployment.
Investigate kernel crashes, performance regressions, and low-level bugs using tools like KGDB, and ftrace.
Collaborate closely with data scientists and security researchers to integrate detection logic and telemetry pipelines.
Participate in design and code reviews; mentor peers in systems programming best practices.

We are looking for an experienced technical leader to guide our high-impact XDR (Extended Detection and Response) team.
This is not a typical management position - its a rare opportunity to lead core innovation at the intersection of AI, advanced security research, and large-scale product development.
You will drive next-generation, AI-powered detection and response capabilities to stop sophisticated attacks such as APTs, ransomware, and emerging threat vectors across OS, browser, and network layers.
Your teams work will operate deep inside operating systems and network stacks, where performance, reliability, and security meet, protecting millions of users globally.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features

We are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities:
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

Senior software engineer Computer Vision We are seeking a highly motivated and experienced Senior software engineer to lead the development of an advanced Vision software stack for cutting-edge unmanned aerial systems.
In this role, you will own the design, integration, and optimization of key capabilities such as Visual-Inertial Odometry, Tracking, ATR, Motion Detection, image preprocessing and stabilization, as well as data -link and video-streaming solutions. You will work closely with Infrastructure, Mission Control, Systems Engineering, Flight Operations, and Product teams to deliver high-performance, reliable, Real-Time autonomy software for operational environments.
Responsibilities:
Contribute to the architecture, design, and implementation of Vision software modules. Lead the development of complex features from concept to production. Collaborate with mission control, systems, infra, and flight teams to ensure robust system integration.
Translate cutting-edge research and PoCs into production-grade solutions. Mentor and support junior engineers.
Ensure high performance, robustness, and Real-Time operation under constrained conditions.

Nuvoton Israel , a leading supplier of custom SoCs and security hardware solutions in the computing and server business, is seeking a skilled and experienced Analog Layout Designer to join our team in Herzliya. As a member of the layout team, you will be responsible for delivering high-quality analog layout for modules integrated into our advanced ASIC ICs.

We are looking for a Academic Development Manager.
Job Responsibilities:
1. Responsible for the exploration and introduction of open academic resources in the ICT and related fundamental theory fields in the region, including academic papers, academic activities, competitions, open datasets, etc..
2. Develop targeted resource expansion strategies based on the characteristics of the regional academic ecosystem (e.g., top local universities, research institutions, industry alliances) to enhance the platform's academic influence locally.
3. Monitor regional academic trends, identify high-value collaboration opportunities (e.g., regional academic conferences), and promote resource alignment and implementation.
4. Resolve regional issues in the resource implementation process (e.g., data compliance, localization of copyright agreements, language adaptation, etc.).
5. Collaborate with cross-functional teams to organize regional academic activities (e.g., technical seminars) to enhance Chasparks brand penetration in the local academic circle.
6. Establish a regional expert network (e.g., scholar advisory board, review committee) to support platform content quality assessment and resource screening.