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We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written.
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack.
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality.
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development.

We are seeking a high-driven, results-oriented multidisciplinary orchestrator to act as the primary catalyst for our development infrastructure. In this role, you will operate at the critical intersection of product strategy, hardware engineering, and lab operations, serving as the connective tissue that aligns disparate teams under a unified goal. You will be responsible for driving cross-functional alignment across the organization, effectively managing stakeholders with differing ownership to ensure infrastructure roadmaps scale alongside product milestones. This position requires a self-starter comfortable pushing for success in ambiguous environments, where you will translate high-level strategy into the tactical execution of the physical and virtual ecosystems that power our development lifecycle.
Your Impact:
You will own the end-to-end lifecycle of infrastructure projects, ensuring that our Sanity Test Beds and development environments are optimized to meet aggressive product launch timelines. By bridging the gap between engineering roadmaps and infrastructure requirements, you will serve as the engine that ensures our teams have the right resources at the right time, regardless of technical or organizational complexity.

We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor AWS cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.

we are looking for a IC Package Design Engineer.
In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.
You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.
Responsibilities:
As a member of the Package Design team, you will:
Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing suport.
Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.
Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.
Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.
Assist in developing and improving package design methodologies, flows, and best practices.
Contribute to debugging, issue resolution, and package bring‑up activities as needed.

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
* Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

we are looking for a ASIC Engineer.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab

DRS RADA Technologies , a leading defense company developing and manufacturing life-saving radar systems is seeking an SMT Technology Engineer to join the Manufacturing Engineering Department at its Beit She’an facility. The role focuses on supporting existing products and transferring NPI (New Product Introduction) products from Development to Manufacturing. The position includes support for highly complex electronic assemblies and technical support for SMT subcontractors. Key Responsibilities:
* Provide engineering support for all electronic assemblies throughout the product lifecycle.
* Troubleshoot issues related to electronic boards, including quality issues, manufacturing challenges at subcontractors, obsolete component replacement, and identification of suitable alternative components.
* Perform failure analysis, investigate technical issues through to resolution, and provide immediate support during critical engineering issues affecting production or customer deliveries.
* Lead engineering projects and manufacturing-focused initiatives, including failure analysis, cost reduction, yield improvement , and other continuous improvement activities.
* Plan and execute engineering experiments to support root cause investigations and validate design changes to electronic assemblies.
* Support NPI products and establish manufacturing infrastructure for serial production.
* Provide technical support for PCB manufacturing and assembly processes at SMT subcontractors for both existing products and NPI programs.
* Support and review Design for Manufacturing (DFM) processes for electronic assemblies.

Required OCS Expert
About Us
An international player in construction engineering and mobility services, we offer a unique global offer combining consulting, engineering and infrastructure operation. Our capacity for innovation allows us to respond to the challenges of the climate and digital world, offering solutions and recognized expertise in the transport and mobility, sustainable city, building, water, environment and energy sectors. The Group has more than 50 years of experience, presence in more than100 countries, and over 20,000 employees around the world.
About the Role
Based in Jerusalem, you will contribute to our urban railway and LRT projects in the city, as well as future transportation projects in Israel. You will lead the OCS/OHLE engineering scope and site construction supervision, provide high-level expertise and oversee the design and implementation of OCS/OHLE systems on the LRT Blue Line.
Reporting to the Technical Manager and Project Manager, your responsibilities will include, but are not limited to:
Providing expert knowledge of Overhead Contact System (OCS) design principles in accordance with applicable international standards, incorporating lessons learned and industry best practices to support Engineering Monitoring and Consultancy (EMC) services.
Reviewing detailed design documentation, calculation notes, manufacturers submissions, and equipment approval processes prepared by the Design & Build (D&B) Contractor to ensure compliance with tender specifications, international standards, and state-of-the-art OCS/OHLE solutions.
Preparing Design Review Sheets (DRS) for submitted design documents.
Reviewing OCS designs (including foundations, poles, anchoring systems, calculation notes, contact wire leveling, tensioning systems, earthing and bonding, lightning protection, voltage-triggering devices, etc.) for both at-grade and underground tunnel sections, and recommending improvements.
Providing ongoing technical support to the clients engineering team regarding project activities.
Preparing technical queries and requests to contractors related to design, procurement, installation, testing, and commissioning-particularly at interface points with the J-Net project (existing Red Line and new Green Line).
Participating in and coordinating weekly meetings on OCS/OHLE activities, including design reviews, system integration, interface management with the existing J-Net project, and site testing supervision, involving all stakeholders (State authorities, designers, and project company).
Coordinating with other discipline experts (civil works, track, power supply, etc.) as required.
Monitoring and reporting progress to the Technical Manager and participating in regular progress review meetings.
Reviewing preliminary OCS designs for planned extensions of the Jerusalem tramway network.
Conducting site supervision visits to assess, monitor, and report on construction activities, identifying deficiencies and ensuring corrective actions are implemented by the contractor.
Representing the OCS/OHLE discipline in meetings with the client, contractors, and stakeholders as required.