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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Design Verification Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will be a part of Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
2 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8643584
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Post-Silicon Validation Engineer, Networking
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We are building a new team to lead the post-silicon validation efforts for our cutting-edge product. We're looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact.
As a Silicon Validation Engineer, you'll play a pivotal role in the validation of our custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Conduct in-depth analysis into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities.
Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on Pre-Silicon (Pre-Si) emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues.
Contribute to the development of test infrastructure and methodologies to improve validation efficiency and coverage.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
8 years of experience with functional tests for silicon validation (i.e., writing in C or C++ or Python or similar).
8 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Ability to learn new systems quickly and work on their own in a changing environment.
Excellent communication and collaboration skills.
Excellent problem-solving skills.
Passion for technical issues with and a strong sense of ownership.
Interest in hardware and a passion for transitioning into silicon validation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643529
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation Engineer, Networking
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture (ARCH) and multiple production teams.
Provide a quality functional coverage for our designs.
Test development and automation, design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++).
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
Experience with functional tests for silicon validation using C or C++.
Experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience in packet processing, data path, packet buffering, scheduler, networking protocols offload engine.
Experience in PCIe interface, PCIe Internal Switch, PCIe components RP/EP, and link establishment.
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Knowledge of L1/L2 layers, Ethernet SerDes (Serializer/Deserializer), Media Access Control+Physical Coding Sublayer (MAC+PCS).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8642066
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Rק/וןרקג Power and Signal Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers.
Requirements:
Minimum qualifications:
PhD degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
Experience in any signal and power integrity domain of electrical engineering through internships, academic research, or publications.
Preferred qualifications:
Experience with industry-standard Electronic Design Automation (EDA) tools for simulation and layout (e.g., Cadence Sigrity/Allegro, Ansys HFSS/PowerDC/Q3D, Keysight ADS, Synopsys HSPICE).
Experience with signal and power integrity modeling and simulation for high-speed interfaces (e.g., LPDDR, MIPI, UFS, PCIe, USB).
Experience with SerDes testing in a lab setting, and familiarity with Ethernet, PCIE, and DDR standards.
Experience in scripting languages such as Python, Perl, or Tcl for flow automation and data analysis.
Familiarity with high-speed testing equipment like VNAs, TDRs, and oscilloscopes for measurement and validation.
Knowledge of circuit analysis, electromagnetics, and transmission line theory.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642051
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience with creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience in four or more System on a chip (SOC) cycles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642040
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Power and Signal Integrity Engineer
About the job
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
Responsibilities
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Requirements:
Minimum qualifications:
Bachelor's degree in Mechanical, Electrical Engineering, Material Science, or equivalent practical experience.
5 years of experience in signal or power integrity or hardware design.
Preferred qualifications:
Experience with industry-standard Electronic Design Automation (EDA) tools for simulation and layout (e.g., Cadence Sigrity/Allegro, Ansys HFSS/PowerDC/Q3D, Keysight ADS, Synopsys HSPICE).
Proficiency in scripting languages such as Python, Perl, or Tcl for flow automation and data analysis.
Familiarity with high-speed testing equipment like VNAs, TDRs, and oscilloscopes for measurement and validation.
Knowledge of circuit analysis, electromagnetics, and trans
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642035
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation and Automation Engineer
Responsibilities
Run, monitor, and analyze nightly Continuous Integration (CI) regression results.
Design and implement new regression methods and supporting infrastructure/Graphical User Interface (GUI).
Identify, debug, and report issues while performing initial root cause analysis and routing to IP owners.
Develop and maintain tools for silicon validation and debug.
Maintain and enhance automation infrastructure for various regression cadences.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
1 year of experience in post-silicon validation, SoC debug, or a similar role.
Experience with Continuous Integration (CI) systems and regression management.
Experience with lab equipment and platform bring-up.
Experience in scripting languages such as Python for test automation, tool development, and data analysis.
Preferred qualifications:
Experience developing software tools, including command-line interfaces and graphical user interfaces (GUIs).
Experience with version control systems (e.g., Git).
Experience with silicon screening or characterization processes.
Familiarity with various Linux distributions and embedded environments like NERF, OVSS, EDK2, etc.
Understanding of computer architecture, SoC design, and IP interfaces.
Ability to debug hardware/software issues and perform root cause analysis in a silicon environment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642021
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Formal Verification Engineer, Cloud
About the job
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties. Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language such as SVA or PSL.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
2 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Understanding of formal verification algorithms.
Proficiency with scripting languages, such as Python.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642015
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an FP&A Business Partner to join the FP&A team, as part of the Finance group.
As a FP&A Business Partner, you will work with key stakeholders in the organization to build and maintain a budget and forecast for one of our Divisions and to support Divisional and Finance leaders with analytical tools for decision making. This role provides a high level of exposure to the organization's Leadership. An ideal candidate will be comfortable navigating such a high-growth, entrepreneurial environment independently.
In your day-to-day as FP&A Business Partner, you will:
Build and develop financial budgeting, forecasting, reporting, and operational metrics tracking for Companys corporate units.
Maintain and improve company financial and operational models, and run ad hoc analysis in various areas, including income, resource allocation, and cohort-level insight.
Deliver insight regarding business metrics, including comparison to prior periods, highlighting key variances / trends and providing high-level commentary for use by management.
Enable data-driven decisioning by working closely as an "analytical arm" to department heads, building business cases that shape key strategies.
Proactively identify and analyze opportunities to drive business improvements and share actionable insights with management.
Requirements:
B.A. or B.Sc. in Economics/Statistics/Business. MBA or MA is a plus
1-3+ years of FP&A or other relevant experience
Prior experience with Tableau, Salesforce, and Google Sheets is a plus.
High proficiency in SQL - significant plus.
Proven experience working closely with BI teams and building complex, data-driven financial models using multiple data sources - significant plus.
Proven experience in creating and building automated workflows and processes for Finance / FP&A work - significant plus.
In-depth understanding of the flow / construction of financial models and prior experience in working with company forecasts / budgets
Ability to communicate data clearly to various company stakeholders.
Understanding of SaaS and relevant industry metrics.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8641986
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07/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a Data Scientist to join our R&D department!
So, what will you be doing all day?
Your daily responsibilities may include:
Working on versatile use cases within a dynamic, fast paced production environment
Strategic thinking and problem solving, with a strong business sense
Analyzing data from various sources, and turning it into usable input
Understanding various use cases from different customers, and creating models that can translate these cases into meaningful insights
Initiating newly defined tasks from exploration to proof of concept
Owning the finalization of defined tasks (from POC to deployment in production)
Collaborating with data engineers to make sure we reach the desired production results
Owning the ongoing validation process for existing metrics
Collaborating and brainstorming best practices with other teams within the R&D department
Deploying machine-learning models into production for an ongoing use
Requirements:
Holds a M.Sc in Computer Science/Mathematics/Physics or any other relevant field - Required
Has 3+ years of experience with statistical and machine learning tools - Python, R, etc.
Strong communicative and verbal abilities to lead and guide customers through the logic of custom-built models
Has previous experience developing machine learning/ image processing/NLP or similar algorithms
Demonstrated experience utilizing probability theory and statistics
Experience with Big Data tools and cloud infrastructure; PySpark, AWS (big advantage)
Strong analytical skills; experience analyzing and processing tabular data, and extracting insights (big advantage)
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8641953
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, is highly beneficial for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8641411
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SOC Performance Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Validate performance and power models from the architecture team and lab measurements against established goals, exercise open source benchmarks, analyze the results, and identify optimization opportunities.
Design and build tests to verify SoC design meets targets, and implement advanced technologies for running "benchmark representations" on pre-silicon environments.
Analyze problems to identify core design weaknesses, and drive resolution of performance issues in both pre- and post-silicon environments.
Collaborate closely with design, validation, and architecture teams to ensure hardware and software designs interface correctly and deliver products.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making, and drive efforts to productize features that improve performance and power characteristics.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience in Silicon post Validation or embedded systems.
3 years of experience in SoC or CPU performance and power modeling, analysis, and debugging.
Experience with computer architecture in areas like interconnects, traffic QoS, distributed caches, and I/O flows.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with hardware description languages like Verilog or SystemVerilog.
Experience in pre- and post-silicon analysis and debugging.
Experience in one or more functional areas, such as coherent fabrics (e.g., AMBA CHI/AXI), memory controllers (e.g., LPDDR5, DDR5), or I/O controllers (e.g., PCIe, CXL).
Experience in productizing features that enhance the performance or power characteristics of a design.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8641218
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
03/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a talented Applied Algorithms & Operational Researcher to join our innovative team. As a member of our team, you will be responsible for analyzing extensive data, developing new metrics for our customers' vast data sets, and creating tools to classify and analyze the data effectively.
Responsibilities:
Conduct comprehensive performance analysis of automotive radar systems, including data collection, processing, and interpretation. Evaluate system performance in various scenarios.
Develop and implement algorithms and tools to process and analyze radar data. Extract relevant performance metrics and provide meaningful insights into system behavior and limitations.
Collaborate with the development team to identify areas for improvement and optimization.
Conduct radar system performance tests and validation procedures. Create test plans, define test cases, and analyze results to ensure system performance meets specified requirements. Identify potential issues, troubleshoot problems, and propose solutions.
Create concise reports, technical documents, and presentations summarizing performance analysis results and recommendations. Effectively communicate findings to cross-functional teams, including engineers, managers, and other stakeholders. Contribute to product documentation and technical specifications.
Requirements:
BSC/ MSc in Electrical Engineering, Computer Science or other related field
Extensive knowledge of radar principles, signal processing, and performance metrics
Proficiency in programming languages such as Python, MATLAB
Analytical and problem-solving Skills
Great verbal and written communication skills.
Excellent verbal and written communication abilities, with the capability to effectively present technical information in a clear and concise manner
Attention to Detail
Strong organizational skills to efficiently manage multiple tasks and prioritize accordingly
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8633955
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/04/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Temporary
We are seeking a highly motivated and qualified Analytical Chemist for a temporary maternity leave replacement position with a strong passion for laboratory work. As part of our CMC team, you will play a central role in the chemical characterization of our products by developing and implementing analytical methods to identify and quantify both known and novel plant-derived compounds.
You will work closely with multidisciplinary teams - including QA/QC, Regulatory Affairs, Tech, and Clinical - to support drug development activities and regulatory submissions, including FDA approval of inhalation technology.
Key Responsibilities:
Operate, maintain, and troubleshoot analytical instruments such as GC/MS, UPLC, and Karl Fischer titrators.
Perform routine and non-routine chemical analyses.
Develop, optimize, and validate analytical methods.
Write and execute protocols related to method development and validation.
Contribute to the preparation of regulatory documentation for drug development submissions.
Support ongoing and future research and development initiatives.
Collaborate effectively with cross-functional teams to advance project goals.
Requirements:
B.Sc. in Chemistry, Biotechnology, or a related fields - Mandatory.
Minimum of 3 years of experience in an analytical or R&D role within the pharmaceutical industry.
Hands-on experience with analytical instrumentation, particularly GC/MS - Mandatory.
Proven experience in analytical method development and validation - Mandatory.
Strong technical writing skills and familiarity with regulatory submission requirements - Mandatory.
Experience with HPLC - Advantage.
Familiarity with MassHunter software - Strong Advantage.
Strong analytical thinking and problem-solving abilities.
Ability to work effectively in a multidisciplinary team environment.
Self-motivated, curious, and detail-oriented.
*** This is a full-time temporary maternity leave replacement position
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8627527
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a Senior Full-Stack Developer to join our Payments Team.

Responsibilities:
Take end-to-end ownership of complex, high-scale payment features
developing new features, building integrations, financial services, tools to utilize large amounts of data, and improving our SaaS architecture for scale.
Build and scale robust full-stack solutions (React, Node.js/TypeScript, AWS)
Collaborate with third-party partners and payment providers in the US and Israel.
Overall, you'll work side-by-side with the industry's top talents, taking ownership of key features and driving the platform's evolution.
Requirements:
At least 6 years of experience as a FS Software Engineer.
Proven experience with a modern FE framework (React, Angular, Vue.js, etc.).
Proven experience with Node.js and TypeScript.
Practice the most advanced server-side techniques available, utilizing microservices and serverless architecture with the best technologies available, including Docker, Kubernetes, and AWS.
Excellent teamwork and interpersonal skills.
Strong leadership and able to work independently.
Fluent English speaker -verbal and written communication is a must.
BSc in Computer Science or Mathematics.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8625495
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