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לפני 1 שעות
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Senior Chip Design Verification Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:
Take a crucial part in developing our next-generation chip controller and boot.
Design and verification with challenging multi-discipline context.
Take part in the development of all our networking and GPU networking chips and systems.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering.
5+ years of validated experience in ASIC Verification.
High Level of English.

Ways to stand out from the crowd:
Background in Specman.
Knowledge in HDL (Verilog/VHDL).
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
This position is open to all candidates.
 
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לפני 3 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Our Chip Design group is looking for best-in-class Senior Design/ Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.



What youll be doing:

Design/ Verification for chip blocks/entities according to specifications, working under challenging constraints with a strong focus on performance.

Engage daily with all aspects of chip development, including Micro-architecture, Firmware, Design/ Verification and Integration.

Work with cutting-edge technology: developing the PCIe Gen7 standard and integrating it across all our chips (GPUs, CPUs, and NICs).
Requirements:
What we need to see:

B.Sc. or M.Sc. in Computer Engineering, Electrical Engineering, Communication Engineering, or equivalent experience.

5+ years of experience in Verification or Design.

High proficiency in English (both written and verbal).

Strong motivation to grow and excel.


Ways to stand out from the crowd:

Knowledge of the PCI Express (PCIe) standard.

Proven experience in Verification or RTL Frontend ASIC Design (Chip Design).

Experience with Specman.

Background in RTL microarchitecture (uArch) and coding.
This position is open to all candidates.
 
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3 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.

Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered.

Experience in full and cluster-level verification is an advantage.

Self-motivated, ability to work independently and drive tasks to completion.

A great teammate with strong communication and interpersonal skills.


Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Knowledge in Networking.

Great interpersonal skills.
This position is open to all candidates.
 
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לפני 1 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

Proficiency using Python, Tcl, Shell, Make scripting.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

Self-motivation, attention to detail, and good interpersonal skills.


Ways to stand out from the crowd:

Experience with data collection and analysis

Experience in methodology definition / flow owner of Full-chip / Place and Route

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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לפני 2 שעות
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering.

You should have at least 5+ years of hands-on layout experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including ERC, LVS and DRC, is necessary.

In-depth knowledge of advanced silicon process technologies.

Familiarity with physical build EDA tools, including Synopsys and Cadence.

A great teammate who thrives in a collaborative environment.

AI tools orientation or alternatively a desire to learn.


Ways to stand out from the crowd:

Experience in Linux environments.

TCL, Python, shell scripting abilities.

Experience with data collection and analysis

Understanding of the chip and die verification process
This position is open to all candidates.
 
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 5 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 2 שעות
חברה חסויה
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering.
You should have at least 5+ years of hands-on Physical Design 'Place and Route' experience, demonstrating your proven expertise.
A strong background in Physical Design methodology, including Synthesis, Floorplan, CTS and Routing, is necessary.
Sign-off stages experince such as , 'STA', 'PV', 'LEC' and 'EMIR'.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.

Ways to stand out from the crowd:
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
Understanding of the chip and die verification process.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 7 שעות
Location: Yokne`am
Job Type: Full Time
We are now looking for a Chip Design & Verification Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design & Verification Engineer in our Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Micro-architecture for RTL and simulation environment planning for units and modules.

Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify, and simulate chip blocks/entities according to specifications.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.
Requirements:
What We Need To See:

B.Sc. in Electrical Engineering or Computer Engineering or equivalent experience.

Experience in RTL design and/or dynamic verification.

Completion of programming and logic design courses.

A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 2 שעות
חברה חסויה
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.

Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

AI use for timing optimization and data analysis.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering.

At least 5+ years of hands-on STA experience.

Experience in Prime Time and signoff methodologies.

A great teammate who thrives in a collaborative environment.

AI tools orientation or alternatively a desire to learn.


Ways to stand out from the crowd:

Agentic Frameworks.

AI prompting experience.

Experience in Linux environments.

TCL, Python, shell scripting abilities.

Experience with data collection and analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 1 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced Design Engineer to join the YU design team and develop the next generation technologies.

As a design engineer in the YU design team, you will participate in definition and implementation of our boot and chiplet control technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated boot components into various projects and using state-of-the-art technologies.
As a member of our YU design team, you will participate in defining various boot and chip controller features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical. Engineering/Communication Engineering.
5+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
High Level of English.

Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
Experience in working with back-end on area, power and timing closures.
This position is open to all candidates.
 
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 9 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation pioneering Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Build reference models, verify and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
What we need to see:

Proven experience in RTL design or RTL verification.

4+ years of relevant experience.

Previous experience in networking - an advantage.

B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.

A great teammate with good communication and social skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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