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We are looking for a highly analytical, detail-oriented Innovation Expert to join our Open Innovation team. This role is ideal for an individual contributor operating at the intersection of deep tech, the startup ecosystem, and academia, with strong technology analytical skills, clear communication, and a foundational background in computer architecture research.

In this role, you will drive our external innovation strategy by managing academic research collaborations, scouting early-stage deep-tech startups, and conducting technical due diligence.

Key Responsibilities
Academic Cooperation & Research Partnerships: Identify and build direct collaboration agreements with world-class professors, research labs, and universities. Facilitate joint research projects, tech-transfer initiatives, and track academic spin-offs.
Startup Scouting & Ecosystem Mapping: Actively identify, source, and map early-stage deep-tech startups and emerging tech companies globally within the companys strategic domains.
Technical Due Diligence: Evaluate startup technologies, product-market fit, and team capabilities. Analyze technical validity and assess how external innovations align with our internal roadmaps.
Ecosystem Analysis: Conduct deep-dive analyses of startup ecosystems, venture capital trends, and academic spin-offs to identify high-potential investment and collaboration opportunities.
Investment & Collaboration Support: Synthesize technical and commercial findings into clear, structured scouting reports, investment tech memos, and presentations for senior leadership to drive partnership or investment decisions.
Cross-Border Collaboration: Act as a bridge between startup founders, academic innovators, and internal global teams (including European and China-based business units) to facilitate joint POCs, or investment reviews.
Track Tech Domains: AI infrastructure, advanced semiconductors, hardware-software co-design, and AI data movement.

We are seeking a talented Assistant Controller to join our Finance team. This is a cross-entity role, focusing on group-wide consolidation, reporting packages, and financial analysis across subsidiaries. The position provides exposure to the full closing cycle and IFRS reporting, while also supporting internal controls in a public company environment.
Key Responsibilities:
Participate in monthly, quarterly, and annual closing processes.
Support the preparation of consolidated financial statements in accordance with IFRS.
Prepare, review and analyze subsidiaries' financial data and internal reports; monitor progress, provide support, and offer guidelines.
Perform cross-entity financial analysis and variance reviews.
Collaborate with the Company's external auditors.
Assist in the implementation and monitoring of SOX/internal controls.
Support group-level accounting procedures and policies.
Handle ad-hoc finance-related projects and special assignments.
Prepare and review statutory and tax filings.

Our Finance team is looking for a payment specialist to be part of the Finance team in Israel (the company is located in both Hod Hasharon & Haifa, the position is in Hod Hasharon)

As key positions for treasury security department, perform high quality payments and collections, ensure compliance with companys policies and procedures.
Processing payments and funds transfer on different e-banking platform, and ensure there are no errors by conducting the necessary checks;
Manage issues in the payment process, such as bank system problems, payment rejections, refunds, etc. Verify the root causes and resolve them to ensure timely payments.
Assist in the providing of bank statements, identify issues in bank statements and resolve them;
Establishment payment rule book guidance, consider the optimization points in the work, to make daily operations more standardized and control payment risk;
Support and perform necessary cooperation for APs department month closing;
Managing the Expense reports reimbursement for all employees
Assist with other finance tasks as needed, such as managing financial operations, assisting FP&A with preparing budget reports etc.,Qualifications and Professional requirements

Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next-generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage, and networking at large scale. We aim to drive innovation and deliver software-defined infrastructure and algorithms for HPC, AI/ML, and Big Data applications.
We are looking for an outstanding Research Team Lead with deep hands-on expertise in large-scale distributed systems, AI framework infrastructure, and performance optimization on custom accelerators. If you are a visionary technical leader, a skilled communicator, and a team builder who thrives at the frontier of systems and AI research - you're welcome on board.

What Will You Be Doing?
Lead and grow a world-class team of researchers and engineers working on distributed AI infrastructure and systems software.
Architect and own the software infrastructure enabling distributed training and inference on Huawei's custom accelerator hardware (e.g., Ascend NPU).
Drive research and development on communication libraries, runtime systems, memory management, and graph execution & synchronization at scale.
Optimize end-to-end performance across large-scale clusters, covering both scale-up (multi-device) and scale-out (multi-node) configurations.
Design and implement high-performance communication backends and collective operations (AllReduce, AllGather, broadcast) for distributed training workloads.
Collaborate cross-functionally with hardware architects, compiler teams, and framework engineers to co-design hardware-software solutions.
Publish and present research findings at top international venues (NeurIPS, EuroSys, SC, MLSys, OSDI) and represent the team externally.
Mentor engineers and researchers, conduct performance and growth reviews, and shape team culture and technical direction.
Partner with top academic institutions and open-source communities to advance the state of the art in distributed AI systems.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.

Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

*Part-Time or Full-Time Opportunity

In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system

We are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.

What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

Our Tel Aviv Research and Innovation Center, is looking for an experienced software engineer with expertise in Linux kernel and virtualization design + development to join our Future-Computing-Infrastructure expert group. The group designs and develops technologies for the next-generation data center aimed at accelerating AI workloads for a unique HW, optimizing compute resource utilization and reducing data-center costs. Our projects involve hardware and software architecture co-design. They require high-level system understanding, creativity and innovative thinking.
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!


What will you be doing?
Design and develop Linux kernel code related to virtual memory management and memory-tiering.
Research, design and innovate methods, algorithms and supporting data-structures for managing memory hierarchies in virtualization environments
Participate in research to analyze AI-based applications performance, identify bottlenecks and optimize various decision-making mechanisms based on benchmarking results.
Collaborate with professional team members and various global teams around the world on a daily basis.
Challenged to think outside of the box and come up with creative ideas to deal with complex challenges within Linux kernel.

We are looking for an experienced Tech Lead to lead a team of 3-5 software engineers developing innovative database security and data protection solutions for enterprise platforms.

This is a hands-on technical leadership role focused on cybersecurity, data security, and advanced software engineering. The successful candidate will combine deep security expertise with strong software architecture skills to define technical direction, lead engineering execution, mentor developers, and build enterprise-grade security solutions.

The role requires strong technical ownership, the ability to solve complex security challenges, and close collaboration with security researchers, product teams, customers, and engineering organizations. Occasional travel may be required for technical discussions and customer engagements.

Responsibilities
Lead and mentor a team of 3-5 software engineers, providing technical guidance and driving engineering excellence.
Define software architecture, technical strategy, and development direction for database security products.
Design and develop advanced cybersecurity and data security solutions for enterprise environments.
Lead security architecture discussions, technical design reviews, and code reviews.
Translate complex security requirements and research concepts into practical, scalable software solutions.
Drive secure software development practices across architecture, design, implementation, and deployment.
Solve complex technical challenges related to security, reliability, scalability, and performance.
Collaborate with security researchers, product management, and cross-functional engineering teams.
Participate in customer-facing technical discussions and occasional international travel.
Remain hands-on and contribute to critical software components and technical decisions.

We are looking for a Principal Engineer with deep expertise in database internals, system architecture, and hardware-aware performance optimization.
This role is responsible for defining and driving advanced database performance solutions by understanding and improving the interaction between database engines, operating systems, and modern hardware architectures.
The ideal candidate is an experienced technical leader with a strong background in database systems, performance engineering, and computer architecture. The candidate should be capable of leading complex technical initiatives, influencing architectural decisions, and developing innovative solutions for next-generation database platforms.
This is a hands-on technical leadership role requiring expertise across database kernels, query execution, transaction processing, memory systems, and low-level performance optimization.

Responsibilities
Define and drive technical direction for database performance optimization and hardware-aware database architecture.
Lead the design and implementation of advanced database optimizations focused on scalability, efficiency, and workload performance.
Solve complex performance challenges across the full system stack, including database engines, query execution, transaction processing, concurrency control, storage engines, operating systems, and hardware platforms.
Design and develop optimizations leveraging modern hardware architectures, including multi-core CPUs, large-memory systems, NUMA platforms, CXL memory, RDMA networking, and advanced storage technologies.
Improve database execution engines, caching mechanisms, memory management, storage systems, and workload scheduling.
Analyze system behavior and identify bottlenecks using profiling, tracing, hardware performance counters, and low-level performance analysis.
Develop benchmarks, workload models, and methodologies to evaluate scalability, efficiency, and architectural tradeoffs.
Collaborate with database kernel, infrastructure, and engineering teams to influence architecture decisions and deliver high-impact improvements.
Mentor senior engineers and contribute to building technical expertise across the organization.
Drive innovation through research, prototyping, technical analysis, and architectural improvements.