לוח משרות דרושים מהנדסים בחיפה

Requirements:
Education: Bachelors or Masters degree in Computer Science, or a related field.
Experience: 2 years of proven experience in AI/ML and software development.
Skills:
Proficiency in Python programming.
Experience with AI projects based on Large Language Models (LLMs).
Familiarity with basic principles of large language models, including prompt engineering and APIs such as OpenAI.
Knowledge of RAG architecture.
Experience with AWS and GPU computing.
Advantageous Skills:
Hands-on experience with RAG-based projects.
Experience with vision language models.
Hands-on experience with classification, detection, and segmentation models.
Familiarity with vision model development, including data augmentation, transformations, and handling imbalanced data.
Experience with the vision model training process.
C++ programming
Strong analytical and problem-solving skills.
Ability to work independently and as part of a team.
Excellent communication skills.
Ability to stay current with emerging AI technologies and methodologies.

Requirements:
Wireless Distributed Networks Algorithm engineer Haifa About the Role:
An exciting opportunity for algorithm engineers looking to expand their expertise into communications.
Join a leading team focused on research and development of algorithms for wireless distributed networks. Responsibilities: Design, analyze, and implement communication network algorithms and unique protocols (e.g., channel access, routing) for complex systems under challenging constraints. Cover the full development cycle: defining communication requirements, solution design, implementation, performance evaluation, and experimental validation. Requirements: Bachelors degree in Electrical Engineering, Computer Engineering, or Computer Science. Masters degree advantage. Experience in algorithm development, simulations, software development, or IP communication systems advantage. Familiarity with communication networks, graph algorithms, optimization problems, data structures, software development, and performance evaluation. Experience with C ++, MATLAB, or Python advantage. Creative problem-solving skills, teamwork, and a desire to develop cutting-edge algorithms.

Requirements:
data Fusion Algorithm engineer Advanced R&D | Haifa, Israel We are seeking a talented data Fusion Algorithm engineer to join a leading research and development team, working on innovative projects that integrate multi-source information into advanced, high-performance systems. What youll do: Design, develop, and validate advanced data fusion and estimation algorithms. Work across both applied research and product development projects. Analyze complex system requirements and devise algorithmic solutions to meet strict performance goals. Implement algorithms in Python, MATLAB, or C ++, and perform verification & validation to ensure robust performance. What you bring: BSc/MSc in Engineering, Computer Science, Mathematics, or related exact sciences. 2+ years of hands-on experience in data fusion, sensor fusion, or estimation algorithms. Proficiency in Python or MATLAB ( C ++ advantage). Knowledge in Kalman filtering, statistical estimation, or related optimization methods. Experience in Machine Learning, graph theory, or spatial reasoning advantage. If you are passionate about solving complex multi-sensor challenges and delivering algorithms with real-world impact, wed love to hear from you. 

Requirements:
Bachelors degree in Economics, Business Administration, Industrial Engineering and Management or a certificate in Bookkeeping required.
Strong attention to detail, creative problem-solving skills, and a high sense of personal responsibility.
Approximately one year of relevant experience an advantage.
Experience with collection processes in an SAP environment -an advantage.
Prior familiarity with the real estate sector an advantage.

Requirements:
An ideal candidate will have at least 10 years of work experience in RTL design, SoC integration, memory controller and interconnect IP design.

Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Minimum Skills and Experience:

Experience with memory sub systems and bus architecture.

Required Skills and Experience :

BS/MS in Electrical and/or Computer Engineering with over 10 years of experience.

Knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI) is a plus.

Experience with Verilog, coupled with design synthesis targeted to achieve specified frequency, power, and area targets.

Processor system knowledge includes basic understanding of SoC systems as well as operating system software is a plus.

Great communication & teamwork skills.

Requirements:
Join Our Team: High-Level & low-level software engineer for Embedded Systems Ready for a new challenge? We're seeking a software engineer to tackle Embedded systems head-on. Lead the charge in crafting innovative solutions with us
Your Adventure Begins:
Spearhead the development lifecycle, from inception to ongoing maintenance.
Showcase your expertise in C ++ programming and mastery of FreeRTOS/ Linux OS.
With 5+ years of software prowess, including extensive experience in Embedded systems, you'll be our guiding star. Why Choose Us?
Embark on a thrilling journey with a rapidly expanding team at the forefront of innovation.
Collaborate with a diverse crew of experts on groundbreaking projects.
Unleash your potential with endless opportunities for growth and advancement.
2 locations: Haifa and Karmiel CV to our email

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.

Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Good understanding of CPU design methodology
Excellent verbal and written communication skills.
CPU related Experience in one of the leading CPU companies or in academia.
Willing to relocate to China for extended period.
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience modeling microprocessors using higher-level languages, like C/C++.

Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MSc or BSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 7 years of relevant research and development experience in industry and academia in the following areas:
Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
Workload characterization and analytical model generation
System Modelling and emulation of HW.
Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and global vision throughout the company
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners.
Excellent oral and written English.