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Required Verification Intern
Job Description Summary
Contributes to the design, development, and verification of Point of Care Ultrasound products and systems.
Responsible for supporting enhancements to existing products and components by identifying issues, implementing improvements, and validating performance.
Works collaboratively within the team, taking ownership of assigned tasks and ensuring high quality deliverables that meet defined requirements and timelines.
Roles and Responsibilities:
Execute laboratory and field validation testing, including test setup, data acquisition, clinical review of datasets and analysis to support product design and verification.
Design and develop test environments, including test setups, instrumentation systems, and supporting test software.
Identify issues, analyze results, and contribute to improvements in product performance, reliability, and quality.
Collaborate with cross-functional teams to ensure alignment between testing activities and product requirements.
Apply and continuously expand technical knowledge within the domain to effectively perform assigned tasks and support team objectives.
Follow established engineering processes and standards while taking ownership of task execution and deliverables.
Work with some autonomy to resolve technical issues within established procedures Consults more senior team members for issues outside of defined instructions/parameters.
Communicate technical and clinical information clearly to team members and stakeholders.
Collaborate and communicate with the team and potentially leads a junior team if needed.
Develop strong customer relationships and serve as the interface between customer and us.

We are a fabless semiconductor company founded by industry veterans, operates as part of us. We develop leading-edge semiconductor products that power Amazon's cloud infrastructure.
As a startup-like organization within us, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms.

We are looking for System SW Test & Development Student to help us develop the semiconductor platform which is based on revolutionary architecture.

In this role, you will be involved in testing cutting-edge hardware systems, ensuring they meet the high standards required for AWS services. Youll work with innovative technologies in a dynamic, open, and fast-paced environment, gaining hands-on experience with both hardware and software systems.

As a member of the System-SW Testing team, youll be responsible for developing and executing test procedures, automating tests, and debugging hardware systems. Your work will play a crucial role in all stages of the product lifecycle: from design and validation to manufacturing and deployment in data centers. Youll collaborate with cross-functional teams across AWS, ensuring our hardware meets the performance and reliability standards expected by our global customers.
Why it matters: Amazon operates on a vast scale, with thousands of services running on hardware systems across the world. Your work will help ensure these systems are reliable, efficient, and cost-effective, impacting services like Amazon.com, AWS, Echo, and more. By testing and optimizing hardware, youll directly contribute to the efficiency and performance of Amazons global operations.

Why you will love it: You will have the opportunity to work closely with teams and leaders across the company, gaining exposure to cutting-edge technologies and research. Youll be part of a team that plays a critical role in ensuring the reliability of AWSs hardware systems, with the chance to make a direct impact on Amazons bottom line. Join us for a challenging, fast-paced, and rewarding experience.

we're seeking a visionary ASIC Design Student to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, designing complex solutions that sit at the heart of our most ambitious connectivity projects.

As an ASIC Design Student, you won't just build chips-you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving unnamed challenges in deep-submicron processes and want to shape the digital design foundation for AI infrastructure connectivity, this is your opportunity.



Key Responsibilities

Assist in the development of micro-architecture, RTL coding, and debugging for complex digital blocks
Utilize industry-leading EDA tools (Lint, CDC, Synthesis) to ensure designs are robust and power-efficient
Work closely with the verification team to run simulations, analyze results, and ensure design quality
Interact with Architecture and Backend teams to understand the full chip development lifecycle
Help leverage AI-based automation tools to optimize engineering workflows

we're seeking a visionary Design Verification Student to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, designing complex solutions that sit at the heart of our most ambitious connectivity projects.

As a Design Verification Student, you will be at the forefront of quality, learning how to ensure that the chips powering the world's largest AI clusters are bug-free and robust.
This isn't just about running tests - its an opportunity to learn advanced verification methodologies (UVM/SystemVerilog) alongside world-class engineers. You will support the development of sophisticated testbenches and help verify high-performance digital blocks that sit at the heart of AI infrastructure.



Key Responsibilities


Assist in building and maintaining System Verilog/UVM-based testbenches, including monitors, checkers, and functional coverage models
Run simulations, analyze failures, and work with the design team to debug and resolve RTL issues
Help define and implement functional coverage and assertions to ensure all "corner cases" of the design are tested
Utilize and improve scripting (Python/Tcl) to streamline verification flows and result reporting
Partner with Design Engineers to understand block specifications and ensure the verification plan matches the design intent

Required Post Si Student position
Our EPG (EyeQ Platform Group) is responsible for the entire lifecycle of the EyeQ chip, from design to validation across different product segments.
In this role, you will work with our engineers across multiple teams to analyze, debug, and develop automation solutions, as well as execute validation plans. You will join the lab team within the Post-Si group and take responsibility for a variety of activities required to validate our EyeQ products. This includes supporting team activities, maintaining platform HW, OS & tools, executing manual and automated tests, and screening/debugging failures. You will also be expected to collect information, analyze data, and provide summary reports.