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We are looking for an experienced Firmware Manager to join the NIC Firmware team at the Yokneam site. You will take part in leading a development team in our Firmware group while taking part hands-on with development activities. The Firmware team develops cutting edge networking features for enabling the AI revolution, cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.

What you will be doing:

Lead a group of engineers and provide technical guidance and career mentorship to the team. Empower the team members to excel and increase team productiveness.

Work closely with the architecture and different software design teams.

Implement new features in the core of our NIC firmware in pre and post silicon environment.

Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.

You will learn how a big software project is operated, maintained, qualified and released, and how Hardware and Firmware are developed.

Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

We are looking for an experienced DFT Engineer to join an exceptional team of DFT experts to develop the next generation DFT technologies.

As a DFT engineer at the networking group, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to productionץ

We are looking for an excellent, creative, and independent IC Test Validation & Automation Engineer to join our Networking unit. Our Networking has continuously reinvented itself over the years, delivering industry-leading high-speed Ethernet and InfiniBand solutions that push performance, bandwidth, and reliability from one generation to the next. In this role, you will help transfer our Network Silicon IC products, including Switch, NIC, and SmartNIC devices, from design engineering to high-quality mass production. You will define and automate IC test validation methodologies, develop validation tests and automation infrastructure, and build scalable flows for regression execution, results collection, reporting, and debug.

You will work closely with HW, SW, FW, SPE, SLT, DFT, security, and production teams, and will be responsible for improving test stability, coverage, quality, and debug visibility across wafer-level and final-test environments. The role includes troubleshooting complex test issues, improving validation methodologies, integrating tools such as Jenkins, Git, Jira, and automation agents, and acting as a gatekeeper for IC test program quality before production release. If you are passionate about IC product testing, automation, and enabling the highest-quality our Networking products, we would like to hear from you.

What you'll be doing:

Definition and automation of IC test validation methodologies and procedures.

Developing validation tests and automation infrastructure.

Building Jenkins-based flows for regression execution, result collection, and reporting.

Using Git-based development workflows for test infrastructure, reviews, and releases.

Integrating Jira and MCP-based tools into validation, debug, and issue-tracking flows.

Maintaining products quality by improving test stability, coverage, quality, and debug visibility.

Troubleshooting test issues and improving automated testing methodologies.

We are now looking for a Senior Hardware Quality Engineer. This role leads the quality strategy and execution across the entire product development lifecycle, ensuring adherence to robust engineering standards and organizational goals. You will drive multi-functional alignment, manage risks, and champion proactive quality measures and continuous improvement initiatives. The mission is to deliver high-quality products by optimizing development, verification, and validation processes from concept to mass production.

What youll be doing:
Lead multi-functional teams to guarantee seamless completion of all development stages, adhering closely to technical guidelines and quality criteria.
Ensure the professional and robust execution of all development phases, strictly adhering to engineering standards and defined quality requirements.
Drive proactive quality activities such as Inquiry, Root Cause Analysis (RCA), and implement effective Corrective and Preventive Actions (CAPA).
Identify, prioritize, track, and mitigate potential risks to prevent impact on schedule and quality.
Manage product changes and maintain configuration control throughout the development lifecycle.
Promote and enforce early detection mechanisms by driving the implementation of early checks, continuous monitoring, and rapid resolution of identified issues.
Ensure the organization is maintaining adherence to quality control plans and processes; maintain and enhance product design development, verification, and validation processes, to allow high quality of products throughout the entire product life cycle.
Partner with Continuous Improvement to drive Quality process improvement initiatives to reduce customer complaints and internal scrap, including developing and coordinating department project planning.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

What you will be doing:
Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.
Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.
Define the architecture of implementing physical layer standards into our ASIC devices.
Involved in standard bodies activities and definition of next generation protocols.
Define features for the phy layer, to exploit interoperability between different generations of communication.
Be involved in product definition and the high-speed protocols that the networking devices will support.
Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.
Become focal point for our physical layer networking communication devices.

Do you consider yourself a Technical Leader? Want to get your hands on NVIDIA's groundbreaking Network technologies? Are you a person whos not afraid of challenges? We are looking for an excellent Senior Optics Firmware Design Engineer to develop the 1600GbE Data Centers and Networks of tomorrow. We develop the FW for every Transceiver and Optical device. Working with the industry leaders in Machine Learning Platforms, Data Centers, High Performance Computing, Storage Platforms and more!

Youll be joining the LinkX FW team who is a Leading Supplier of End-to-End Interconnect Solutions and that cares about who and what you are. We are a fast-growing company with positive energy that emanates from our team members' internal drive to develop, market, sell, and support ground breaking products and services. We are a strong believer in developing our employees and giving them the tools to succeed!

What you will be doing:

Develop our next-generation network products Firmware.

Developing cutting edge technology and systems with Optical Engines.

Take part in sophisticated networking Firmware features development for Cloud and Datacenter. Focusing on Physical Link-up process and optimizations.

Collaboration with leading Network companies which are our customers.

Our HW Sustain team in Israel is looking for an board designer to join the sustaining engineering team . The team leads the HW sustaining of networking infrastructure for our next-generation data centers focusing on accelerated performance while enabling optimized end to end GPU connectivity.

What you'll be doing:

You will take engineering ownership of networking products once they are released to production.

Provide engineering technical leadership for improving product availability, driving cost reduction, and resolving manufacturability issues.

Work on debugging and resolving HW related quality issues to improve customers' satisfaction.

We are looking for a skilled Software Developer with strong hardware knowledge to join our team developing production test solutions for optical transceivers and networking products. Our team builds the software and test infrastructure used on production lines to validate our optical and interconnect products. The work combines instrument automation, low-level software development, and direct control of custom hardware. You will work with optical instruments such as power meters, variable optical attenuators, and laser sources, as well as custom test boards used to control and communicate with the device under test (DUT).

This is a hands-on, technically deep role that spans the entire development lifecycle-from hardware bring-up and debugging to validation, deployment, and production support. As a technical focal point, you will work at the intersection of hardware and software, collaborating with electrical, hardware, thermal, mechanical, and software engineers to deliver robust and scalable test solutions across multiple production lines and products.

What Youll Be Doing:

Design and develop production test systems for optical transceivers, networking hardware, and interconnect products.

Develop software that controls optical test instruments, custom test boards, and other hardware components.

Write low-level drivers and hardware-control software in C and C++, and integrate native code with higher-level C# applications through DLL wrappers.

Read and interpret electrical schematics, block diagrams, datasheets, timing requirements, and hardware specifications.

Lead hardware bring-up, validation, and deployment of test solutions in production environments.

Debug complex hardware-software integration issues using oscilloscopes, logic analyzers, software tools, and hardware communication interfaces such as I2C, SPI, and UART.

Investigate failures, identify root causes, and implement reliable corrective solutions.

Collaborate with cross-functional teams to translate hardware requirements into software interfaces and automated test procedures.

Take technical ownership of projects from initial concept and prototype development through production release and ongoing support.

Improve test coverage, system reliability, maintainability, and scalability across multiple products and production lines.

We are looking for a best-in-class Chip Design - HW Emulation Senior Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. Join our world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Connecting emulator/FPGA based solutions to real external H/W or virtual targets, taking care of complex testbench and different protocols.

This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, scripting, and lab-based bring up of the design.

We are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction

What you'll be doing:

Develop and maintain design automation and methodologies for SoC and networking clock flows.

Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.

Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.

Support SoC integration and construction flow activities across multiple projects.

Assist in timing, power, and noise analysis to ensure efficient performance.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Designing and implementing SOC level clock requirements.

Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks.

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

We are looking for a Host and Systems Performance Manager to join ur Networking Performance team!

In this role, you will lead a team of engineers who measure, analyze, and improve NIC, host, DOCA networking stack, and system-level performance across our networking products and platforms. We work across the full product lifecycle, from early architecture and pre-silicon modeling through post-silicon bring-up, validation, characterization, and GA readiness.

We are looking for someone who enjoys building teams, turning complex performance data into clear direction, and partnering across engineering groups to improve products that support AI, HPC, cloud, and accelerated networking workloads.

What Youll Be Doing:
Lead, coach, and develop a team focused on NIC, host, DOCA networking stack, and system-level performance. You will define performance test plans, methodologies, metrics, and success criteria for our new networking technologies.
Guide pre-silicon and post-silicon performance planning, analysis, reporting, and readiness reviews. Your team will benchmark and profile workloads across RDMA, RoCE, InfiniBand, Ethernet, MPI, NCCL, DOCA, storage, security, and host networking stacks.
Identify bottlenecks across NIC, DPU, CPU, memory, PCIe, firmware, drivers, Linux networking, DOCA, and full-system architecture. We will look to you to lead root-cause analysis, coordinate mitigation plans, and help hardware, firmware, software, architecture, validation, and product teams align on performance goals.

What youll be doing:
Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.
Work on impactful projects involving state-of-the-art high-performance computing hardware and software.
Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.
Collaborate with our partners and customers.