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10/05/2026
Location: Yokne`am
Job Type: Full Time
Required Senior Manager, DPU Performance and System Validation
Join us as a DPU Performance and SV Manager and play a pivotal role in inventing the future of innovative computing technology! This is an outstanding opportunity to lead a dynamic team in Israel, boosting the performance of the entire DPU Chip Develop department to new heights.
What you'll be doing:
Lead and manage a group of 25+ engineers, coordinating two key teams: Performance in DV and Simulation Model, and System Validation.
Collaborate with the ARCH team to define and implement the Performance Verification (PV) Plan, ensuring comprehensive test coverage and platform integration.
Coordinate the performance emulation and functional validation processes, ensuring seamless readiness for TapeOut from a performance perspective.
Participate in post-silicon performance debugging, contributing to the flawless execution of performance improvements.
Develop and unify performance debug processes across all platforms, ensuring consistency and efficiency.
Requirements:
Proven experience in performance management within the chip build industry.
Outstanding leadership skills with the ability to manage and encourage a diverse team of engineers.
Solid technical expertise in DPU performance and system validation, accompanied by a history of effective implementation, or equivalent experience.
Strong collaboration abilities, with the capability to engage effectively with cross-functional teams to identify and achieve performance objectives.
Ambitious approach and the drive to achieve world-class performance standards.
B.Sc. in Electrical Engineering, Computer Engineering, or equivalent
15+ years of overall experience in ASIC development/validation, including 5+ years of management experience.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8644412
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10/05/2026
Location: Ra'anana and Yokne`am
Job Type: Full Time
We are seeking experienced electrical engineers with a passion for system-level thinking and innovation in high-performance optical switch development. This role offers a unique opportunity to shape and deliver next-generation products that push the boundaries of high-speed optical communication.
What Youll Be Doing:
Lead and serve as the technical focal point for the integration of PHY system aspects and optical (CPO) electrical subsystems, ensuring their performance.
Hands on cross-disciplinary testing efforts and lab work, collaborating with system architecture, optics, silicon, thermal, mechanical, signal/power integrity, and software teams.
Characterization and testing of optical links using lab equipment (e.g., oscilloscopes, BER testers, optical spectrum analyzers and simulation tools).
Driving product scalability, working with internal partners-qualification teams to transition designs from prototype to high-volume production.
Documentation and reporting of design specifications, test results, and performance metrics.
Requirements:
B.Sc. in Electrical Engineering from a leading university or equivalent experience
8+ years of relevant experience.
Strong analytical and problem-solving skills.
Excellent communication and collaboration abilities.
Enthusiasm for working on multidisciplinary projects.
Solid engineering intuition and understanding of physical trade-offs.
Ability to thrive in a fast-paced development environment.
Ways to stand out from the crowd :
M.Sc./PhD degree in electrical engineering
Experience in high-speed Transceiver and PHY design is highly valued
Strong knowledge and experience in electro-optic communication or high-speed signals and analog circuits
Hands on experience with optoelectrical lab work and validation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8644401
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/05/2026
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering
You should have at least 5+ years of hands-on Physical Design 'Place and Route' experience, demonstrating your proven expertise.
A strong background in Physical Design methodology, including Synthesis, Floorplan, CTS and Routing, is necessary.
Sign-off stages experince such as , 'STA', 'PV', 'LEC' and 'EMIR'.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.
Ways to stand out from the crowd:
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
Understanding of the chip and die verification process.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8643799
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/05/2026
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.
We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering
You should have at least 5+ years of hands-on layout experience, demonstrating your proven expertise.
A strong background in Physical Verification methodology, including ERC, LVS and DRC, is necessary.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.
Ways to stand out from the crowd:
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis
Understanding of the chip and die verification process.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8643787
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/05/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.
Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.
Engage in cutting-edge PCIe generation working on latest PCIe gen7.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.
2+ years of experience in Verification.
High Level of English.
High motivation to grow and excel.
Ways to stand out from the crowd:
Knowledge in PCI Express standard.
Validated experience in Verification or RTL Frontend ASIC Design (Chip Design).
Background in Specman/ UVM.
Background in RTL uArch & coding.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8643761
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/05/2026
Location: Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643707
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/05/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications
Integrations and Full-Chip models
Interaction with organization-wide groups.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/ Electrical Engineering/ Communication Engineering or equivalent experience
2+ years experience in verification or similar position
High Level of English
Ability to work as part of a team
Ways to stand out from the crowd:
Validated experience in Verification
Experience in Specman
Background in UVM/SV
Knowledge in HDL (Verilog/VHDL).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643694
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