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Our Networking AI Platforms Security group is redefining how security operates at scale by embedding AI at the core of its detection, defense, and engineering workflows. We are seeking a Senior Security Architect to design, build, and deploy intelligent AI agent systems tackling our most complex security challenges. Working alongside security architects, engineering, and platform teams, this role offers a rare opportunity to shape the future of AI-powered security at one of the world's most innovative companies!

What you'll be doing:

Design and deploy AI agent systems for security workflows: PQC transition, attacker-defender frameworks, threat modeling, and automated mitigation deployment.

Build frameworks integrating LLMs, RAG, and automation pipelines with security data sources and engineering workflows.

Partner with product and architecture organizations to embed security requirements early and translate threat landscapes into scalable solutions.

Own the full agentic system lifecycle: architecture, prototyping,productization, testing, and operational stewardship.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.

Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

AI use for timing optimization and data analysis.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.

Do you want to join a team of highly motivated and experienced project managers who drive the successful introduction of our next generation GPU/CPU based products? We work closely with internal leaders to ensure the Data Center Engineering & Operation (DCEO) team collaborate with SME to deliver datacenter capacity to provide the environment for our product team to achieve Time-To-Market. As part of the team, your knowledge of datacenter construction and project management will enable you to swiftly make the course adjustments needed to keep these complex projects on track!

What You'll Be Doing:
As the Senior Technical Project Manager, Datacenter, you will lead datacenter and superlab bring‑up programs, ensuring all MEP systems plus base network, security, and facility monitoring services are installed, tested, commissioned, and production‑ready.

Lead all aspects of program governance and multi‑project execution, driving alignment across global teams and time zones.
Gather SME inputs, including ROM estimates and final BOMs, to support design, budgeting, and procurement.
Direct cabinet installation, rPDU deployment, structured cabling, and rack‑ready infrastructure.
Coordinate WAN circuit design, ordering, vendor engagement, installation, and activation.
Facilitate architecture‑level technical discussions to align design intent, resource planning, and deployment strategy.
Ensure Site Acceptance Testing (SAT) and Integrated Systems Testing (IST) are completed with full documentation and SME sign‑off.
Drive continuous improvement by identifying workflow, process, and communication enhancements across distributed teams.