דרושים » חומרה » HardWare Manager

Our company is seeking a Hardware Development Team Lead to lead cross-functional development and integration activities across the organization. The successful candidate will oversee collaboration between all engineering disciplines, including Hardware, RF, Software, and Firmware, while serving as the key interface with the Systems Engineering team.
Key Responsibilities:
Lead and directly manage a multidisciplinary engineering team developing complex systems, including Mechanical, Hardware, Firmware, and RF engineers, ensuring execution according to project plans, schedules, and objectives.
Lead end-to-end product development, including system architecture definition, technical oversight, prototype development, and design verification and validation (V&V).
Serve as the primary liaison between development engineers, the Systems Engineering team, and Project Managers.
Evaluate, introduce, and implement new development tools, methodologies, and emerging technologies.
Define priorities and allocate engineering tasks based on business needs, project requirements, and market considerations.
Establish engineering methodologies, development processes, project milestones, and required deliverables for internal design reviews (PDR, CDR, etc.).
Define engineering roles and responsibilities, recruit new team members, mentor engineers, conduct performance evaluations, and develop individualized professional growth plans.
Conduct routine management activities, including status meetings, management reviews, and project progress meetings.
Prepare technical responses for project tenders (RFPs), including technical proposals, effort estimation, and cost evaluation.
Provide technical support for both internal engineering challenges and customer-facing technical issues.
Lead internal and customer design reviews as required.

We are looking for a program manager with technical skills for HW R&D organization, responsible for programs and project on various Network products. The PM will drive execution and scheduling of HW projects while aligning with corporate priorities and constraints.

What you'll be doing:

Responsibility to coordinate between all project stakeholders such as marketing, engineering teams, operations etc. from initial requirements definition through delivery.

Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.

Responsibility for developing and implementing HW methodologies and Project management processes and tools.

Required Machine Learning Hardware Architect, Hardware, Software Co-Design, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Machine Learning Hardware Architect within the Co-design team, you will serve as a technical lead bridging model architecture innovation and next-generation hardware design. Operating at the highest levels of AI research and engineering, you will define the goal and architectural roadmap for our future machine learning serving and training capabilities. You will guide the integration of ML research such as massive-scale foundation models with advanced silicon architectures to create industry-leading, high-performance, and power-efficient accelerators.
Responsibilities:
Define and drive the technical roadmap and architecture for the hardware/software stack to ensure exceptional performance for ML models. Act as the technical liaison across research, software, and hardware teams, steering model architecture innovation to maximize scaling, quality, and hardware efficiency.
Architect next-generation configurable simulation frameworks and performance models, setting the organizational standard for evaluating complex microarchitectural decisions. Drive high-stakes choices regarding Power, Performance, Area (PPA) and buildability for future chip and system architectures, expertly balancing long-term technological trends with strict product delivery timelines.
Guide system-level performance analysis across highly distributed ML systems, innovating new methodologies to optimize and balance compute, memory bandwidth, and inter-chip network requirements. Their leadership will directly shape the future of high-performance AI infrastructure and hardware-software co-design.
Manage cross-functional partnerships across hardware, compiler development and ML teams.

We are looking for a senior HW Engineer to join the HW team to lead the design of system hardware includes the development of cards and enclosures for compute, storage, and communication systems for space. Come explore space with us!



What You Will Be Doing


Lead board design through all development stages: from definition to implementation, bring-up, qualification and final release.
Full responsibility for electrical specification, schematic design, components selection and layout considerations till board fabrication and assembly
Extensive lab bring-up and debugging until the testing platform is efficiently implemented on the Production floor.
Combine an understanding of the electronics, FW and SW aspects into the accurate system architecture.
Collaborate with multidisciplinary R&D engineering teams
Monitor environment testing

The HW PM team focuses on HW engineering development activities; managing multiple complex programs that support the development and TTM of new Networking products for datacenter segment. The role of PM organization gives an individual the principal responsibility of overseeing and coordinating the program and rollout, the mission is to cover all stages of program development, including schedule planning, resource allocation, cohesive program execution, change management, and cycle closure with post-mortems.


What you'll be doing:

Track milestones, manage resources, coordinate activities, assign tasks, and lead progress.

Collaborate with cross-functional teams to address gaps and resolve issues.

Run project meetings, share updates, coordinate objectives, review projects, generate reports, and escalate to management as needed.

Identify threats, solve daily problems, and quickly implement mitigation strategies.

Optimize scheduling, logistics, staffing, testing, communication, implementation, and execution.

Assess risks, execute risk management plans, and ensure alignment with program milestones.

Report project status to leadership regularly.

We are seeking a high-driven, results-oriented multidisciplinary orchestrator to act as the primary catalyst for our development infrastructure. In this role, you will operate at the critical intersection of product strategy, hardware engineering, and lab operations, serving as the connective tissue that aligns disparate teams under a unified goal. You will be responsible for driving cross-functional alignment across the organization, effectively managing stakeholders with differing ownership to ensure infrastructure roadmaps scale alongside product milestones. This position requires a self-starter comfortable pushing for success in ambiguous environments, where you will translate high-level strategy into the tactical execution of the physical and virtual ecosystems that power our development lifecycle.

Your Impact

You will own the end-to-end lifecycle of infrastructure projects, ensuring that our Sanity Test Beds and development environments are optimized to meet aggressive product launch timelines. By bridging the gap between engineering roadmaps and infrastructure requirements, you will serve as the engine that ensures our teams have the right resources at the right time, regardless of technical or organizational complexity.

Key Responsibilities

Strategic Orchestration & Alignment

Unified Roadmap Integration: Translate complex product development roadmaps into long-term infrastructure requirements, driving cross-functional alignment between silicon milestones and lab availability.
Stakeholder Management: Act as the primary liaison between hardware engineering, software development, procurement, and lab operations; navigate competing priorities among stakeholders with differing ownership to keep teams synchronized.
Ambiguity Management: Proactively identify project roadblocks and navigate ambiguous environments to push critical-path dependencies to resolution.
Operational Velocity: Drive continuous improvement in infrastructure processes, identifying and removing friction to increase overall engineering velocity.
Operational Oversight & Execution

Strategic Capacity Planning: Lead high-stakes capacity management efforts, forecasting needs for power, rack space, and compute resources to proactively eliminate infrastructure bottlenecks.
Lifecycle Ownership: Oversee the full lifecycle of infrastructure projects-from initial procurement and technical specification through deployment, validation, and transition to operational readiness.
Visibility & Reporting: Drive the development of dashboards and reporting mechanisms to provide real-time visibility into infrastructure health, ensuring data-driven decision-making across the organization.
Vendor & Asset Optimization: Partner with cross-functional leadership to manage technical specifications, equipment lead times, and hardware lifecycles, ensuring a high-performance, cost-effective infrastructure footprint.

Required Hardware/Electrical Engineering BS/MS Intern, 2027
Please complete your application before November 13, 2026. We encourage you to apply as early as possible as we review applications on a rolling basis.
About the job
The Cloud and AI Infrastructure team in Israel focuses on building our next-generation systems. The team's work is grounded in creating custom hardware, and as an Intern, you'll get to collaborate with engineers from various parts of the organization to influence the future of Cloud and the AI infrastructure by working on the foundational technology that makes it all possible. This is the hardware that powers everything, from Cloud to our most advanced models like Gemini.
As an Electrical Engineering Intern in the domain of Very Large-Scale Integration (VLSI), you will work on designing, developing and verifying next generation chips for our Cloud Compute Infrastructure. You will have the opportunity to collaborate with engineers from various parts of the organisation to help develop our next generation systems on chip (SOC).
Responsibilities:
Responsibilities and detailed projects will be determined based on your educational background, interest and skills.

Electronics Engineer – Product Development Management & Sustaining Engineering Team
For our Yokneam site, we are looking for an Electronics Engineer to join the Product Development Management and Sustaining Engineering Team.
The team is responsible for the technical management of electronic product development, ongoing collaboration with System Engineering, integration and support of boards and systems, system adaptations, and electronic design activities throughout various stages of the product lifecycle.
Responsibilities: Ongoing support for company products, including: Technical leadership and matrix collaboration with multiple interfaces, including System Engineering, Mechanical Engineering, Software, and Design Processes, with full responsibility for engineering design and implementation of engineering changes. Design, schematic creation, and schematic updates at the electronic design level (Board Design), including implementation of new functionalities in a Mentor Expedition environment. Leading and supporting PCB layout activities for a wide variety of boards across different business units and adapting them to various projects and systems. Hardware integration at both product and system levels. Responsibility for identification, selection, and implementation of replacement components, including management of the Obsolescence (OBS) process while maintaining functional and performance compatibility with existing systems. Leading Engineering Change Orders (ECOs) and maintaining documentation within engineering management systems.
Requirements: B.Sc. in Electronics Engineering from a recognized institution, or Practical Electronics Engineer with proven development experience. Experience working with hardware/electronic systems and a strong understanding of electronic principles, including analog and digital circuits. Experience in understanding electronic circuits and reading schematics. Hands-on experience in Board Design and PCB development/layout – a significant advantage. Proven experience working in a hardware laboratory with advanced electronic test equipment (Oscilloscope, Power Supply, Signal Generator). High level of technical English, including the ability to read and understand datasheets. Familiarity with military systems – an advantage.
* This position is open to all qualified candidates. ** Only suitable applicants will be contacted.
#Yokneam Illit

Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.

Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.

Define product specifications, develop electrical schematics, and guide component selection.

Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.

Required ML Hardware Achitect
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will help shape the future of Clouds next-generation AI infrastructure, architecting high-performance Machine Learning silicon designed to power hyperscale AI inference. You will have an opportunity to drive accelerator technology that powers Generative AI models, large language models (LLMs), and emerging agentic workloads where throughput, latency, memory bandwidth, and energy efficiency are mission-critical.
You will be part of a silicon architecture team pushing the boundaries of custom computing. Leveraging your deep expertise in hardware-software co-design, machine learning algorithms, and computer architecture, you will define and optimize custom compute engines and memory hierarchies that accelerate the world's most advanced AI models across Cloud datacenters.
Responsibilities
Lead the architectural definition, modeling, and specification of next-generation, high-performance ML compute IP and acceleration blocks for Cloud AI silicon.
Own the ML IP architecture specification throughout the entire product lifecycle: concept exploration, cycle-accurate modeling, implementation, silicon bring-up, and production.
Partner closely with leading AI research and algorithm teams (e.g., Google DeepMind, Gemini research teams) and software compiler teams (XLA, PyTorch) to explore architectural trade-offs and define hardware requirements for emerging model architectures.
Drive comprehensive architecture studies, evaluating compute dataflows, numerical formats, sparsity, and specialized acceleration mechanisms such as key-value (KV) cache optimization.
Drive performance, latency, power efficiency, and silicon area projections across model topologies and workload configurations.