דרושים » חשמל ואלקטרוניקה » Senior AI Networking System Architect

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced AI models such as GPT and DeepSeek. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research various of solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are seeking a highly motivated architect to join our team of experts and take part in shaping the future of high-performance ML / AI computing. Our next-generation Spectrum-X, InfiniBand and NVLink systems will be at the heart of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today. As a system/software architect, you will have the opportunity to work on some of the most innovative technology that is currently driving the world forward.

What youll be doing:

Define the next generations of Spectrum-X, InfiniBand and NVLink SW architecture.

Research of various solutions by defining and running POCs, evaluate SW and HW impact and conveying the solution architecture to the relevant teams. The solutions can span over various layers: from algorithms and high level software to firmware and HW.

Collaborate with multi-functional teams, including other architecture teams, VLSI logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

Our Network Architecture, Modeling and Performance Insights group is seeking a skilled and driven hands-on Network Modeling Architect to conduct advanced network research and optimization while utilizing and enhancing our advanced simulation tools.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network topologies, configurations, logic and traffic patterns, and analyzing their effect on end-to-end performance. You will develop expertise in our simulation tools and write code daily to contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance. If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

 

What you'll be doing:

Analyze and model our AI and High Performance Computing offerings, deep dive into network behavior for training and inference and generate insights to directly impact the architecture of next-generation of AI systems. Conduct advanced network modeling, research and optimization using innovative simulation tools.

Write production-quality C++ and Python code daily. Hands-on modeling of advanced network topologies, configurations and traffic patterns representing real life AI workloads, and analyze their effect on the system's performance. Actively develop the simulator software solution while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

We are seeking a highly skilled Senior Performance Engineer to join our Performance and R&D organizations. In this role, you will help build and evolve systems that support performance analysis, telemetry, and optimization for large-scale GPU- and CPU-based clusters used in AI and high-performance computing environments. You will work closely with hardware, networking, firmware, and software teams to collect, analyze, and interpret performance data from live systems. This is a fast-paced R&D environment where system behavior and requirements evolve rapidly, requiring adaptable engineering solutions and strong analytical thinking.

What youll be doing:

Profile, benchmark, and analyze AI and HPC workloads on GPU and CPU clusters.

Explore performance characteristics of high-performance networking and collective communications (e.g., NCCL, RDMA, MPI, RoCE).

Identify performance bottlenecks across networking, compute, memory, and system architecture.

Develop and enhance performance analysis, benchmarking, and diagnostic tools.

Define performance test plans and establish expectations for new technologies and platforms.

Collaborate across hardware, firmware, networking, systems, and software teams to provide actionable performance insights.

Support telemetry collection and data refinement efforts to enable accurate performance analysis.

Maintain high standards for data quality, reproducibility, and traceability of performance results.

Our Networking BU group is seeking to hire an expert Firmware Design Engineer for the Ethernet Switch Firmware Core team. The next generation of Switches are a crucial component of the most innovative AI and Cloud Computing Networks in the world. As a member of the Ethernet Firmware Team, you will craft and develop the firmware abstraction layer in the ETH Switch. This role will require you to participate in the design & development of firmware while working closely with hardware and architecture team to ensure timely delivery of our products to the market.

What you'll be doing:

Highly involved in the entire software development process from architecture to integration testing of firmware for the Spectrum ASIC product line.

Work with HW & ASIC team to provide insights into developing the next gen of the groundbreaking of silicon and systems.

Design and implement algorithms to improve system scale and performance.

Work with higher layer software teams to debug issues reported by customers (internal and external).

Design, implement and integrate new features according to the product roadmap.

Have a new insight on how to improve our software? Why not! Bring your ideas to life by innovating during our hackathons

Collaborate with other R&D teams around the globe.

We are looking for an outstanding Senior Networking Software Architect to join the NIC/DPU Software and Firmware Architecture group. In this role, you will help define the next generation of our datacenter and AI networking platforms, with focus on DPU management, QoS, performance, telemetry, and software architecture across stacks. You will work closely with hardware designers, firmware/kernel driver teams, system engineers, validation, product management and customers. The role spans early architecture definition, pre-silicon design, bring-up, and production readiness for large-scale AI and cloud datacenter deployments.

What Youll Be Doing:

Own software and system architecture for next-generation DPU management, QoS, performance, telemetry, and observability features.

Define end-to-end control and management flows across DOCA, host drivers, embedded firmware, BMC, management controllers and external management systems.

Specify telemetry and observability requirements, including counters, logs, traces, events, health monitoring, debug data, and streaming telemetry.

Define management interfaces and APIs for configuration, provisioning, lifecycle operations, diagnostics, and field serviceability.

Write clear architecture specifications, interface definitions, flow diagrams, and design documents for software, firmware, and system teams.

Partner with R&D teams to translate high-level architecture into implementable designs and guide features through development, validation, silicon bring-up, and production.

Analyze system performance bottlenecks, interoperability issues, telemetry gaps, and customer-reported issues, then feed learnings into future architecture.

Collaborate with system and cluster architects to ensure NIC/DPU features fit end-to-end AI datacenter and cloud networking designs.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network topologies, configurations, logic and traffic patterns, and analyzing their effect on end to end performance. You will develop expertise in our simulation tools and contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance.

If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

What you'll be doing:

Analyze and model our AI and High Performance Computing offerings, deep dive into network behavior for training and inference and generate insights to directly impact the architecture of next-generations of AI systems. Conduct advanced network modeling, research and optimization using innovative simulation tools.

Implement modeling of advanced network topologies, configurations and traffic patterns which represent real life AI workloads, and analyze their effect on the systems performance. Actively develop the simulator software solution while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

We are looking for an experienced Firmware Engineer to join the QoS NIC Firmware team at the Yokneam or Tel-Aviv site. You will take part in leading a major development team in our Firmware group while taking part hands-on with development activities. The Firmware team develops cutting edge networking features. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.

What you will be doing:

Take part in research, design, and development of QoS and FW algorithms, enhancing performance, reliability, and scalability.

Work closely with the architecture and different software design teams.

Implement new features in the core of our NIC Firmware in pre and post silicon environment.

Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.

We are looking for a Distinguished Engineer to help shape the future of AI infrastructure. As part of our advanced development and research efforts, you will drive technical vision and innovation across the AI software stack, spanning GPU computing, RDMA, NVLink, storage, and large-scale distributed systems. You will research next-generation system designs, influence product and platform direction, and help define how massive-scale AI environments are built, optimized, and operated through hardware-software co-design.

What youll be doing:

Research, define, and drive co-design solutions across AI software stacks involving GPU computing, RDMA networking, NVLink interconnects, storage, and large-scale distributed infrastructure.

Lead deep technical investigations and proof-of-concept development in areas related to distributed AI, deep learning systems, high-performance computing, virtualization, memory management, and large-scale systems design.

Work closely with multiple teams across us to advance next-generation AI infrastructure technologies and influence cross-stack co-design decisions.

Analyze end-to-end system bottlenecks and opportunities across compute, networking, memory, and storage layers to improve performance, scalability, and efficiency.

Guide the design of environments that support massive-scale AI training and inference workloads in production.