Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.

Required CPU Design for Test Engineer, Cloud
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency,
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

Were looking for an Engineering Team Lead, who will be responsible for the foundational infrastructure framework used by all our company engineering teams to build, deploy, and operate AI agents safely in production. We are building the "operating system" for AI at our company, covering agent sessions, memory management, tool orchestration, durable execution, and multi-tenant isolation. You will lead a high-impact team of 5 engineers to create the runtime and platform that defines the future of autonomous enterprise intelligence.
Youll Own:
Agentic Framework Architecture: Designing and building our companys internal agentic framework, leveraging and integrating industry-standard tools such as LangChain, LangSmith, ADK, and similar ecosystems.
Evaluation and Quality Systems: Building evaluation frameworks and workflows for AI agents, including offline and online evaluations, quality metrics, regression detection, and experimentation infrastructure.
Team Leadership & Mentorship: Leading a squad of 3-4 senior engineers, fostering a culture of technical excellence, and managing end-to-end delivery in a fast-paced environment. You will spend approximately 50% of your time hands-on, architecting core systems and reviewing code, and 50% leading the team, mentoring engineers, and aligning with cross-functional stakeholders.
Observability, Monitoring, and Guardrails: Providing the organization with robust observability capabilities for AI agents, including tracing, logging, monitoring, cost tracking, and safety guardrails to ensure reliable and responsible usage.
Developer Enablement Platforms: Creating APIs, SDKs, and abstractions that enable product teams to easily build, test, and operate agents while adhering to platform standards.
Cross-Language Integrations: Designing integrations and tooling across Python and Java to enable seamless adoption of the AI framework within our companys broader backend ecosystem.
Youll Solve:
Agent Lifecycle and Orchestration Complexity: Managing agent execution, tool usage, memory, workflows, and failure modes in production-grade systems.
AI System Reliability at Scale: Ensuring agents remain observable, debuggable, and safe as usage scales across teams and products.
Evaluation and Drift Challenges: Detecting quality regressions, model behavior changes, and unintended agent behaviors through robust evaluation and monitoring systems.
Platform Adoption Friction: Balancing flexibility with guardrails so teams can innovate quickly without compromising reliability, security, or cost controls.
Youll Impact:
Company-Wide AI Enablement: Empowering every engineering team at our company to build agent-based solutions faster, with higher quality and confidence.
Foundational AI Infrastructure: Establishing the core frameworks, evaluations, and observability standards that all AI agents at our company will rely on.
AI Safety and Quality Bar: Raising the bar for how AI systems are evaluated, monitored, and governed across the company.

We are looking for a Senior II Software Engineer to join the CX Platform team, the foundational engineering team powering our entire Customer Experience group. This is a high-impact, hands-on role at the intersection of backend engineering, AI infrastructure, and customer-facing product.

You'll work across the full platform stack (backend services, data pipelines, security, cost, and scale) with a meaningful and growing focus on AI infrastructure. We own the agentic platform for the entire Product Offering group: from building the LLM infrastructure and agentic workflows to ensuring they're reliable, observable, and safe in production.

What you'll be doing:
Own AI infrastructure for the Product Offering group. Design, build, and evolve the shared AI platform (agentic workflows, LLM integrations, observability, and guardrails) that CX product teams build on.
Ship agentic features end to end. Lead development of AI-driven capabilities using LangChain, LangFuse, and AWS Bedrock, from architecture through production deployment and monitoring.
Drive platform architecture. Set the technical direction for the CX backend (services, data pipelines, API patterns) with an eye for scalability, reliability, and developer experience.
Own core data foundations. Design resilient data-access patterns across Snowflake, Elasticsearch, Kafka, Redis, and MySQL; keep pipelines fast, fresh, and reliable.
Mentor and elevate. Help engineers across the CX group grow in backend craft, AI engineering, and system design thinking.
Collaborate cross-functionally. Work with product, design, and customer-facing teams to turn ambiguous problems into well-scoped, high-quality solutions.

Required Micro-Architect, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead Design Activities at IPs, SubSystems(S.S) and SoC.
Define the block-level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up, as well as test plan development and coverage analysis for block and SOC-level verification.
Communicate and collaborate with multi-disciplined and multi-site teams.

This role is ideal for experienced backend engineers (ideally with strong Python skills) looking to transition into program leadership.You must thrive in a fast-paced environment and bring a proven track record of designing, building, and operating AI agents or agentic workflows.
We are at a pivotal point in our journey, transforming how we deliver product integrations-the core of our platform-by shifting from manual engineering to AI-first workflows powered by agents and agentic pipelines.
As a Senior Technical Program Manager, you will lead this transformation. You will collaborate closely with Customers, Partners, Product, and Engineering to scope and design integrations with IT and security tools. Simultaneously, you will redefine the entire integration lifecycle-using AI to automate how customer requests are analyzed, connector designs are created, and software is delivered from early access through full launch.
Your Impact
Lead AI Workflow Transformation: Drive the evolution of key business and engineering workflows from manual execution to AI-first, agent-driven processes.
Design & Scale Agentic Pipelines: Build, deploy, and continuously optimize multi-agent workflows that automate the lifecycle of integration requests-from intake and API requirement analysis to automated design generation, code reviews, and validation.
Drive Technical Integration Scoping: Work closely with Customers, External Partners, Business Development, Product, and Security Architects to scope use cases and create technical design requirements for third-party IT and security integrations.
Enhance Engineering Productivity: Improve developer throughput and software quality by integrating AI-powered tools (e.g., GitHub Copilot, OpenAI APIs) and agentic knowledge systems into the daily engineering lifecycle.
End-to-End Program Ownership: Support cross-functional teams throughout the full software development lifecycle of integrations, establishing scalable operational engineering processes to transition projects seamlessly from early access through full launch.
Cross-Functional Alignment: Partner with cross-functional peers to align solutions, resolve conflicts, clear operational bottlenecks, and drive complex technical issues to resolution.

Required Senior SoC Test Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Product sustain support, including volume data analysis, test time and yield improvements, assess test escapees and RMAs, localize failures, implement containment measures and partner with design, manufacturing, quality and reliability teams to root cause and implement corrective actions.
Develop tools, flows and methodologies to continuously improve and automate the testing life cycle.

Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Appdome's mission is to protect every mobile app in the world and the people who use them. We are the leader in AI-native mobile business protection, providing cyber and fraud teams with an agentic platform that builds, monitors, and maintains security defenses in Android and iOS apps — with no SDKs, no coding, and no disruption to engineering cycles.
Our platform delivers over 400 security, anti-fraud, anti-bot, and API protection capabilities, powered by deep learning models trained on a decade of mobile defense data and trillions of live threat events. From build time to runtime, Appdome's AI Agents help mobile brands detect, investigate, and respond to threats faster than ever — recognized as the best AI Platform for Cyber Resilience at RSA Conference 2026 for the second consecutive year. Leading financial, healthcare, m-commerce, and B2B brands rely on Appdome to secure over 50,000 mobile apps and protect more than 1 billion end users globally.
Appdome is an Equal Opportunity Employer. We are committed to diversity, equity, and inclusion in our workplace. We do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other characteristic protected by law. All qualified applicants will receive consideration for employment without regard to any of these characteristics.
?About the Role
We are looking for a Data Assurance Engineer with strong experience in data validation, automation, analytics testing, and large-scale event pipeline quality.
This role is focused on ensuring the accuracy, stability, and reliability of data across our analytics and security event systems. The ideal candidate will be responsible for building automated validations, investigating data discrepancies, monitoring data quality, and working closely with engineering, data, and product teams.
Responsibilities

* Design, build, and maintain automated validation processes for large-scale event pipelines.
* Validate end-to-end data flows across ingestion, processing, storage, and dashboard layers.
* Create SQL-based validations to verify event counts, unique devices, metadata accuracy, schema
* consistency, latency, and data freshness.
* Investigate discrepancies between production systems, staging environments, data warehouses, object
* storage, and customer-facing dashboards.
* Monitor event volume, data latency, anomalies, spikes, drops, duplicates, and missing data.
* Build and maintain CI/CD validation jobs using tools such as Jenkins or GitLab CI.
* Create clear automated reports, dashboards, and email summaries for validation results.
* Work closely with backend engineers, data engineers, QA teams, and product stakeholders to identify,
* report, and validate fixes for data quality issues.
* Support performance and scalability testing for analytics dashboards, queries, and data pipelines.
* Help improve internal data assurance processes, data observability, and production monitoring.