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חברה חסויה
Location: Haifa
Job Type: Full Time
we are looking for skilled and motivated senior logic design engineers to join our next generation Snapdragon projects.

With this position you'll be joining the VLSI team of the Camera group working on cutting-edge image signal processor (ISP).

You will be working on innovative design implementing novel image processing and computer vision algorithms (traditional and ML based) that will further raise the bar of image capture for mobile, auto, connected smart camera application and much more.
Requirements:
2-5 years of significant logic design engineering experience

Knowledge in digital design domain, preferably from the field of ASIC design front end activities

Hands on experience in micro-architecture definition from specification, RTL development and debug

Preferred Qualifications:
Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)

Experience in scalable design implementation (definition and coding)

Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.

Ability to work in a team

Ability to understand system wise aspects like interaction of HW with SW and FW
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
Join us Camera Systems team and help develop next-generation imaging technologies for mobile and AR/XR devices.

What you'll do
Develop image processing, ISP (Image Signal Processing), video processing, and computational photography algorithms.

Design hardware-friendly imaging algorithms for implementation in dedicated ISP and imaging accelerators.

Define camera system flows that combine imaging and auxiliary sensors to achieve industry-leading image and video quality.

Drive the development of new imaging hardware architectures and processing pipelines.

Collaborate with architecture, hardware, software, and systems teams throughout the product lifecycle.
Requirements:
Strong interest in image processing, ISP, computational photography, and camera systems.

Solid understanding of signal processing and algorithm development.

Programming experience in C/C++, Python, and MATLAB.

Self-driven, curious, and able to learn independently.

Strong communication and teamwork skills.

Experience with SoC architecture, embedded systems, ISP pipelines, or HW/SW co-design is a plus.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design Verification Vision Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, youll work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive cutting-edge distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
Youll be part of a team that pushes boundaries, developing robust, autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You'll contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in our edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with Architecture, Software, Design, and Physical Design stakeholders to make technical decisions and represent project status throughout the development process.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
10 years of experience working with hardware verification languages (e.g., System Verilog/Specman), design verification methodologies (e.g., UVM) and chip design flow.
Experience in leading chip verification teams through the full lifecycle from concept to delivery.
Experience in creating chip or subsystem design verification strategies and plans.
Preferred qualifications:
15 years of experience in verification of complex SoC/ASIC.
10 years of experience managing verification teams.
Experience in chip design/verification of high performance AI/ML accelerators.
Experience with industry verification techniques, including complementary techniques such as formal verification, and emulation.
Experience in low power verification.
This position is open to all candidates.
 
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05/07/2026
חברה חסויה
Location: Haifa
Job Type: Full Time
We are looking for an experienced FPGA Design Engineer who will play a pivotal role in developing , designing and optimizing FPGA solutions for our cutting-edge projects. Your expertise will drive innovation and excellence in digital design as part of the detection team in CT\AMI.
Your role :
Develop FPGA logic using VHDL / Verilog
Design and implement high-speed data paths and interfaces such as DDR, PCIe, Ethernet.
Perform simulation, verification, timing closure, and debugging
Integrate FPGA with soft processors (such as MicroBlaze / Nios), sensors, ADCs/DACs, and other system components
Support system bring-up, lab validation, and debugging at both board and system level
Collaborate closely with hardware, firmware, software, and system teams
Support and participate in architecture discussions and design reviews
Read and understand board schematics to support integration and troubleshooting
Support digital component replacement activities, including identifying alternatives and validating implementation impact
Perform lab and system-level testing after component changes or design updates
Document FPGA design, interfaces, and implementation details
Support release processes in PLM (Product lifecycle Management) system , including documentation updates and design release activities
Requirements:
Bachelor's degree in Electrical Engineering
6+ years of hands-on FPGA design experience, in a multidisciplinary industry.
Strong experience in digital logic design and debugging
Strong knowledge of VHDL / Verilog
Experience with Xilinx tools, especially Vivado
Knowledge and experience with high-speed serial interfaces (such as: Ethernet, DDR) and protocols like AXI.
Familiarity with high-speed interfaces and memory systems
Ability to read and understand system schematics
Experience with lab debugging and validation
Ability to document design work clearly and support structured release processes
Familiarity with Windchill and engineering release workflows
Advantages
Experience with UVM or other verification methodologies
Background in imaging systems or signal processing
Experience in medical devices or other regulated industries
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Electrostatic Discharge Engineer
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Electrostatic Discharge (ESD) Engineer, you will be responsible for designing, implementing and maintaining measures to prevent and control electrostatic discharge from electronic components and devices. The role involves analyzing, evaluating and mitigating potential ESD-related on die risks for advanced silicon technologies.
Responsibilities
Develop and implement ESD control plans and procedures for new silicon products.
Evaluate ESD risks associated with different stages of product design, manufacturing and handling, and recommend mitigation strategies to ensure compliance with industry standards.
Manage simulation tools such as: PERC (mentor), path finder (ansys).
Know ESD design rules and industry standards.
Collaborate with cross-functional teams to identify and resolve ESD-related issues in products and processes.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical or Electronics Engineering, a related field, or equivalent practical experience.
8 years of experience in ESD control in a manufacturing or product development environment.
Experience in ESD hazards and techniques for preventing and controlling static electricity.
Experience scripting in TCL or Python.
Preferred qualifications:
Masters degree in Electrical Engineering, or a related field.
Experience in chip reliability.
Ability to work independently and as part of a team.
Strong problem-solving skills.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
we are looking for a hands‑on Design Verification Lead to drive verification of next‑generation wired/wireless peripheral subsystems that power Snapdragon platforms.

As a DV Lead in the Peripheral group, you will own verification of complex IPs and subsystems, define and execute UVM‑based verification strategy, and lead a small team of talented engineers to first‑time‑right silicon.

This is a 5 days on site position in Haifa
What youll do

Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks

Architect, develop, and maintain UVM‑based constrained‑random verification environments

Lead day‑to‑day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance

Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation and validation teams

Analyze and close functional and code coverage, drive quality metrics to tape‑out criteria

Contribute to methodology and flow improvements across the Peripheral DV team
Requirements:
BSc/MSc in Electrical/Computer Engineering or related field

At least 7 years of hands‑on verification experience using UVM and SystemVerilog

Strong background in digital design and SoC/IP architecture

Proven technical leadership:

Prior experience leading or mentoring engineers or

Demonstrated ability and motivation to lead a small DV team (e.g., ownership of major IP, driving cross‑functional efforts)

High technical proficiency in:

UVM testbench architecture (agents, sequences, scoreboards, coverage)

Constrained‑random, coverage‑driven verification

Debugging complex failures in large‑scale regressions

Scripting (Python/Perl/Tcl/shell) in a UNIX/Linux environment
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
Required Software Engineer II, Engineering Productivity
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
We're reimagining what it means to search for information - any way and anywhere. To do that, we need to solve complex engineering challenges and expand our infrastructure, while maintaining a universally accessible and useful experience that people around the world rely on. In joining the Search team, you'll have an opportunity to make an impact on billions of people globally.
Responsibilities
Develop and maintain classifiers to detect and enforce trust policies for different search products.
Support Trust and Safety teams for removal and evaluation of trust violations.
Work with close teams (Fringe, SafeSearch) on integration within Scuti services.
Support clients to onboard on Shield service.
Maintain high-queries per second (QPS), high-availability, low-latency production service.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
1 year of experience with software development in one or more programming languages (e.g., Python, C, C++, Java, JavaScript).
1 year of experience with data structures or algorithms.
1 year of experience building developer tools (e.g., compilers, automated releases, code design and testing, test automation frameworks).
1 year of experience using AutoML techniques for natural language processing tasks.
Preferred qualifications:
Familiarity with heavy data pipelines.
Familiarity with developing and fine-tuning LLMs.
Familiarity with production systems/services (Maintaining high-QPS, high-availability, low-latency services).
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.
Requirements:
Minimum Qualifications:

Knowledge and experience in high-speed interfaces, such as PCIe, Storage, Networking, Automotive interfaces

Several years of experience in ASIC design and development

Familiarity with VLSI and system-on-a-chip principles, operation, and internals

Preferred Qualifications:

Advantage to experience with ARM based SoC Real-time systems, SW architecture, and SW Drivers, Advantage to Linux and Android

Participation in standards organizations and contributing to published specifications

Good communication skills across engineering disciplines, both verbally and in writing in Hebrew and English

Education Requirements Required:

Bachelor's, Electrical Engineering, or equivalent experience

Preferred: Master's, Electrical Engineering, or equivalent experience
This position is open to all candidates.
 
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Location: Herzliya and Haifa
Job Type: Full Time
As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in power EM/IR analysis to develop, define and refine the methodologies and flows for gate-level, as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis, scan mode IVD analysis, package and interposer model handling, 3DIC and multi die analysis, power EM analysis, SigEM, power switch modeling, design abstract and reuse for EM/IR purposes, IP / SoC level EMIR sign-off / ECO, and much more.

In this highly visible role, your primary responsibilities will include:
- Development of custom EM/IR solutions that scale with accuracy and capacity challenges.
- Streamline and automate EM/IR flow with ownership of the entire flow.
- Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their EM/IR requirements for various post-layout flows.
- Work side by side with EDA vendors and foundries for tool qualification, debug, and enhancement.
Requirements:
Minimum Qualifications:
Experience in EDA Tool, CAD flow and EMIR methodology.
Proficiency in at least one of Tcl, Python or Perl scripting languages.
Experience in some of the analysis involved in EMIR - extraction, timing, noise, simulation, physical design and/or verification.
Minimum requirement of BS + 3 years of relevant industry experience.

Preferred Qualifications:
Ability to coordinate and drive initiatives with little to no oversight.
Excellent communication and presentation skills.
Hands on knowledge of industry leading EMIR tools e.g. Voltus, VoltusFi, RedHawk-SC, Totem.
Experience in development of large scale software in multi user, multi site environment.
Hands on experience with analysis, optimization and debugging of IR/IVD/Electromigration issues on high performance, large scale designs and silicons.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Emulation Hardware Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Maintain and upgrade emulation models and infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team and customers, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic design automation (EDA) tools, licensing, and job management in our infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., DDR, Peripheral Component Interconnect Express (PCIe), Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Experience with associated EDA tools, automation, and flow enhancements.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with FPGA systems (e.g., EP, HAPS, Protium).
Experience with hybrid emulation or speed bridges.
Experience with coding in Verilog/SystemVerilog for design.
Experience with design debug tools (e.g., Verdi, Verisium).
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
Required Software Engineer
Job Description Summary
As a Software Engineer - PET Data Acquisition, you will join a highly specialized team developing the real-time software stack at the core of our PET/CT imaging systems.
Our software directly impacts image quality and system reliability, enabling clinicians worldwide to provide accurate diagnoses and life-saving care.
You will work on a distributed, high-performance C++ system running on Linux, responsible for configuring detector hardware, processing high-throughput data streams, and enabling seamless integration across the scanner ecosystem.
Job Description
About the Team
Our team develops the data acquisition platform powering our PET/CT scanners.
This system:
Configures and interfaces with detector hardware
Receives high-rate event streams via UDP
Performs real-time sorting and time-stamping of coincidence events
Manages acquisition state and persistence
Exposes control and monitoring APIs to clinical applications
The platform is a distributed, multi-process, multi-threaded C++ system running on Linux, designed for deterministic, high-performance operation under demanding workloads.
Key Responsibilities:
Design and develop end-to-end data acquisition features, from low-level UDP capture and event processing through service layers and client APIs
Optimize and maintain performance-critical code paths, including:
Lock-free / low-contention data structures
Thread affinity and NUMA optimization
Zero-copy buffer management
Deterministic real-time execution
Enhance and maintain inter-process communication mechanisms, including shared memory, message queues, and service interfaces
Work with embedded persistence layers (SQL-based) for configuration, metadata, and runtime state
Collaborate closely with hardware, physics, and system teams to integrate new detector and system components
Develop unit and integration tests, and actively participate in code and design reviews
Troubleshoot complex cross-process issues using advanced debugging and profiling tools (e.g., gdb, perf, tcpdump, strace).
Requirements:
B.Sc. in Computer Science, Computer Engineering, Software Engineering, or equivalent practical experience
4+ years of experience in C++ development on Linux, including modern C++ (C++14/17)
Strong experience with:
Multi-threaded and multi-process systems
Synchronization primitives, memory models, and concurrency challenges
Inter-process communication (IPC) mechanisms such as shared memory, sockets, and message queues
Solid understanding of system-level programming and performance optimization
Working knowledge of SQL / relational databases - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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